[llvm] [mlir] [NVPTX] Added more MMA intrinsics for F8F6F4 and FP64 types. (PR #156040)

[Artem Belevich via llvm-commits]

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@@ -90,6 +90,21 @@ def __init__(self, geom, frag, ptx_elt_type, is_mma_sparse=False):
             "m16n8k32:b:s8": 2,
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Artem-B wrote:

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You should generate those tests, include them into this PR, and make sure they pass with PTXAS testing enabled via `LLVM_PTXAS_EXECUTABLE=/path/to/ptxas` with ptxas from both cuda-13, and a few older versions (e.g. with 12.9, and 11.8) to make sure instructions are properly constrained and are accepted by ptxas.
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https://github.com/llvm/llvm-project/pull/156040