[llvm] Fix legalizing `FNEG` and `FABS` with `TypeSoftPromoteHalf` (PR #156343)

[via llvm-commits]

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@@ -3670,6 +3674,24 @@ SDValue DAGTypeLegalizer::SoftPromoteHalfRes_UnaryOp(SDNode *N) {
   return DAG.getNode(GetPromotionOpcode(NVT, OVT), dl, MVT::i16, Res);
 }
 
+SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FABS(SDNode *N) {
+  SDValue Op = GetSoftPromotedHalf(N->getOperand(0));
+  SDLoc dl(N);
+
+  // Clear the sign bit.
+  return DAG.getNode(ISD::AND, dl, MVT::i16, Op,
+                     DAG.getConstant(0x7fff, dl, MVT::i16));
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beetrees wrote:

`TypeSoftPromoteHalf` seems to be explicitly designed for only `f16`/`bf16`, so I think explicitly spelling out the constant makes it clearer.

https://github.com/llvm/llvm-project/pull/156343