[llvm] [SPIR-V] Implement SPV_KHR_float_controls2 (PR #146941)

Marcos Maronas via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 2 07:26:40 PDT 2025


================
@@ -552,12 +569,53 @@ void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
     }
     if (ST->isKernel() && !M.getNamedMetadata("spirv.ExecutionMode") &&
         !M.getNamedMetadata("opencl.enable.FP_CONTRACT")) {
-      MCInst Inst;
-      Inst.setOpcode(SPIRV::OpExecutionMode);
-      Inst.addOperand(MCOperand::createReg(FReg));
-      unsigned EM = static_cast<unsigned>(SPIRV::ExecutionMode::ContractionOff);
-      Inst.addOperand(MCOperand::createImm(EM));
-      outputMCInst(Inst);
+      if (ST->canUseExtension(SPIRV::Extension::SPV_KHR_float_controls2)) {
+        // When SPV_KHR_float_controls2 is enabled, ContractionOff is
+        // deprecated. We need to use FPFastMathDefault with the appropriate
+        // flags instead. Since FPFastMathDefault takes a target type, we need
+        // to emit it for each floating-point type that exists in the module
+        // to match the effect of ContractionOff. As of now, there are 4 FP
+        // types: fp16, fp32 and fp64.
+        for (const MachineInstr *MI :
+             MAI->getMSInstrs(SPIRV::MB_TypeConstVars)) {
+          // Skip if the instruction is not OpTypeFloat.
+          if (MI->getOpcode() != SPIRV::OpTypeFloat)
+            continue;
+
+          // Skip if the target type is not fp16, fp32, fp64.
+          const unsigned OpTypeFloatSize = MI->getOperand(1).getImm();
+          if (OpTypeFloatSize != 16 && OpTypeFloatSize != 32 &&
+              OpTypeFloatSize != 64) {
+            continue;
+          }
+
+          MCInst Inst;
+          Inst.setOpcode(SPIRV::OpExecutionMode);
----------------
maarquitos14 wrote:

Done.

https://github.com/llvm/llvm-project/pull/146941


More information about the llvm-commits mailing list