[clang] [llvm] [ARM] enable FENV_ACCESS pragma support for hard-float targets (PR #137101)

[Erik Enikeev via llvm-commits]

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@@ -186,9 +186,7 @@ def APSR       : ARMReg<15, "apsr">;
 def APSR_NZCV  : ARMReg<15, "apsr_nzcv">;
 def SPSR       : ARMReg<2,  "spsr">;
 def FPSCR      : ARMReg<3,  "fpscr">;
-def FPSCR_NZCV : ARMReg<3,  "fpscr_nzcv"> {
-  let Aliases = [FPSCR];
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Varnike wrote:

Yes, in general they should be aliases. However, this behavior will lead to the test changes discussed above (e.g. Thumb2/mve-fmas.ll): they occur because some of the instructions begin to change the FPSCR (that is, FPSCR_NZCV too because they are aliases), so during scheduling it is no longer possible to leave everything as is.

> I think we need to teach it that the fpscr bits of nofpexcept instructions and fpscr_nzcv do not interact and can be treated separately for scheduling. 

My understanding is that while they alias, this approach won’t work (please correct me if I'm wrong). To keep the existing tests unchanged, it might be necessary to change the patterns for most instructions which can raise fp exception and change FPSCR:  instead of using any_* add individual patterns fot strict_*. This can lead to significant complications in writing patterns for fp. 

 Can you tell if you see a simpler way to solve this? Also how critical is the fact that some tests (e.g. Thumb2/mve-fmas.ll) may change?

https://github.com/llvm/llvm-project/pull/137101