[llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)

[David Green via llvm-commits]

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@@ -20073,6 +20073,26 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
     Known = KnownOp0.intersectWith(KnownOp1);
     break;
   }
+  case ARMISD::VORRIMM:
+  case ARMISD::VBICIMM: {
+    KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
+    unsigned Encoded = Op.getConstantOperandVal(1);
+    unsigned DecEltBits = 0;
+    uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, DecEltBits);
+    bool IsVORR = Op.getOpcode() == ARMISD::VORRIMM;
+
+    if (Op.getScalarValueSizeInBits() == DecEltBits) {
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davemgreen wrote:

I think we might be best off just updating the known bits when we know `Op.getScalarValueSizeInBits() == DecEltBits`. I believe that will always be the case, it just might change in the future and we don't want things to go subtly wrong.

https://github.com/llvm/llvm-project/pull/149494