[llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)

[Sam Elliott via llvm-commits]

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@@ -16112,6 +16112,13 @@ static SDValue combineXorToBitfieldInsert(SDNode *N, SelectionDAG &DAG,
                                         m_Value(Inserted))))))
     return SDValue();
 
+  KnownBits Known = DAG.computeKnownBits(Inserted);
+
+  // Check if all zero bits in CMask are also zero in Inserted
+  APInt CMaskZeroBits = ~CMask;
+  if (!CMaskZeroBits.isSubsetOf(Known.Zero))
+    return SDValue();
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lenary wrote:

Computing known bits is much more difficult than e.g. looking at the value type or checking if something is a shifted mask. Can you re-order this check to after the other two checks for efficiency?

https://github.com/llvm/llvm-project/pull/154135