[llvm] e8b5fbd - [AMDGPU, RISCV] Fix warnings
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 1 16:34:24 PDT 2025
Author: Kazu Hirata
Date: 2025-09-01T16:34:17-07:00
New Revision: e8b5fbd5fa0d0fbe0cc788964cb7e34482301348
URL: https://github.com/llvm/llvm-project/commit/e8b5fbd5fa0d0fbe0cc788964cb7e34482301348
DIFF: https://github.com/llvm/llvm-project/commit/e8b5fbd5fa0d0fbe0cc788964cb7e34482301348.diff
LOG: [AMDGPU, RISCV] Fix warnings
This patch fixes:
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp:451:13:
error: explicit specialization cannot have a storage class
[-Werror,-Wexplicit-specialization-storage-class]
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp:452:13:
error: explicit specialization cannot have a storage class
[-Werror,-Wexplicit-specialization-storage-class]
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp:454:1:
error: explicit specialization cannot have a storage class
[-Werror,-Wexplicit-specialization-storage-class]
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp:456:1:
error: explicit specialization cannot have a storage class
[-Werror,-Wexplicit-specialization-storage-class]
While I am at it, this patch changes the storage types of InsnBitWidth
specilization to "inline constexpr" to avoid linker errors.
Added:
Modified:
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index 80d194afa926b..2dc607608b80c 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -448,12 +448,12 @@ static DecodeStatus decodeVersionImm(MCInst &Inst, unsigned Imm,
#include "AMDGPUGenDisassemblerTables.inc"
// Define bitwidths for various types used to instantiate the decoder.
-template <> static constexpr uint32_t llvm::MCD::InsnBitWidth<uint32_t> = 32;
-template <> static constexpr uint32_t llvm::MCD::InsnBitWidth<uint64_t> = 64;
+template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth<uint32_t> = 32;
+template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth<uint64_t> = 64;
template <>
-static constexpr uint32_t llvm::MCD::InsnBitWidth<std::bitset<96>> = 96;
+inline constexpr uint32_t llvm::MCD::InsnBitWidth<std::bitset<96>> = 96;
template <>
-static constexpr uint32_t llvm::MCD::InsnBitWidth<std::bitset<128>> = 128;
+inline constexpr uint32_t llvm::MCD::InsnBitWidth<std::bitset<128>> = 128;
//===----------------------------------------------------------------------===//
//
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 395672fe5b68b..987d6c7e1900a 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -702,10 +702,10 @@ static constexpr DecoderListEntry DecoderList32[]{
};
// Define bitwidths for various types used to instantiate the decoder.
-template <> constexpr uint32_t llvm::MCD::InsnBitWidth<uint16_t> = 16;
-template <> constexpr uint32_t llvm::MCD::InsnBitWidth<uint32_t> = 32;
+template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth<uint16_t> = 16;
+template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth<uint32_t> = 32;
// Use uint64_t to represent 48 bit instructions.
-template <> constexpr uint32_t llvm::MCD::InsnBitWidth<uint64_t> = 48;
+template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth<uint64_t> = 48;
DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
ArrayRef<uint8_t> Bytes,
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