[llvm] [RISCV] Use slideup to lower build_vector when all operand are (extract_element X, 0) (PR #154450)

[Luke Lau via llvm-commits]

https://github.com/lukel97 approved this pull request.

LGTM, the new restriction makes sense to me given #154847

I think it would also be worthwhile to separately try removing the restriction anyway and see to what extend the register overlap constraint affects it. 

https://github.com/llvm/llvm-project/pull/154450