[llvm] a3dfedf - [LV] Check both cases in hints-trans.ll: live and dead scalar loop.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 1 03:53:59 PDT 2025
Author: Florian Hahn
Date: 2025-09-01T11:53:40+01:00
New Revision: a3dfedf09e017b00cb3cf5235c24cc57b96eb5b6
URL: https://github.com/llvm/llvm-project/commit/a3dfedf09e017b00cb3cf5235c24cc57b96eb5b6
DIFF: https://github.com/llvm/llvm-project/commit/a3dfedf09e017b00cb3cf5235c24cc57b96eb5b6.diff
LOG: [LV] Check both cases in hints-trans.ll: live and dead scalar loop.
Update hints-trans.ll to check both cases: 1) live scalar loop after
vectorization, 2) dead scalar loop after vectorization.
Added:
Modified:
llvm/test/Transforms/LoopVectorize/hints-trans.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/hints-trans.ll b/llvm/test/Transforms/LoopVectorize/hints-trans.ll
index 3c7ef44f1d340..853be301da40f 100644
--- a/llvm/test/Transforms/LoopVectorize/hints-trans.ll
+++ b/llvm/test/Transforms/LoopVectorize/hints-trans.ll
@@ -1,29 +1,84 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-vectorize,instsimplify,simplifycfg -force-vector-interleave=1 -force-vector-width=4 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s
+
; Note: -passes=instsimplify,simplifycfg -simplifycfg-require-and-preserve-domtree=1 remove the (now dead) original loop, making
; it easy to test that the llvm.loop.unroll.disable hint is still present.
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-; Function Attrs: norecurse nounwind uwtable
-define void @foo(ptr nocapture %b) #0 {
+define void @scalar_loop_dead_after_vectorization(ptr nocapture %b) {
+; CHECK-LABEL: define void @scalar_loop_dead_after_vectorization(
+; CHECK-SAME: ptr captures(none) [[B:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
+; CHECK-NEXT: store <4 x i32> splat (i32 1), ptr [[TMP0]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 16
+; CHECK-NEXT: br i1 [[TMP1]], label %[[EXIT:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
entry:
- br label %for.body
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %arrayidx = getelementptr inbounds i32, ptr %b, i64 %iv
+ store i32 1, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, 16
+ br i1 %ec, label %exit, label %loop, !llvm.loop !0
-for.cond.cleanup: ; preds = %for.body
+exit:
ret void
+}
-for.body: ; preds = %for.body, %entry
- %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %arrayidx = getelementptr inbounds i32, ptr %b, i64 %indvars.iv
+define void @scalar_loop_not_dead_after_vectorization(ptr nocapture %b) {
+; CHECK-LABEL: define void @scalar_loop_not_dead_after_vectorization(
+; CHECK-SAME: ptr captures(none) [[B:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
+; CHECK-NEXT: store <4 x i32> splat (i32 1), ptr [[TMP0]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 16
+; CHECK-NEXT: br i1 [[TMP1]], label %[[LOOP:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[LOOP]] ], [ 16, %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]
+; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 17
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %arrayidx = getelementptr inbounds i32, ptr %b, i64 %iv
store i32 1, ptr %arrayidx, align 4
- %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
- %exitcond = icmp eq i64 %indvars.iv.next, 16
- br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !0
-}
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, 17
+ br i1 %ec, label %exit, label %loop, !llvm.loop !0
-; CHECK-LABEL: @foo
-; CHECK: = !{!"llvm.loop.unroll.disable"}
+exit:
+ ret void
+}
-attributes #0 = { norecurse nounwind uwtable }
!0 = distinct !{!0, !1}
!1 = !{!"llvm.loop.unroll.disable"}
+;.
+; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]], [[META3:![0-9]+]]}
+; CHECK: [[META1]] = !{!"llvm.loop.unroll.disable"}
+; CHECK: [[META2]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK: [[META3]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]], [[META3]]}
+; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
+;.
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