[llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)

[Robert Imschweiler via llvm-commits]

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@@ -535,6 +535,138 @@ unsigned GCNSubtarget::getMaxNumVGPRs(const MachineFunction &MF) const {
   return getBaseMaxNumVGPRs(F, MFI.getWavesPerEU());
 }
 
+// Check to which source operand UseOpIdx points to and return a pointer to the
+// operand of the corresponding source modifier.
+// Return nullptr if UseOpIdx either doesn't point to src0/1/2 or if there is no
+// operand for the corresponding source modifier.
+static MachineOperand *
+getVOP3PSourceModifierFromOpIdx(MachineInstr *UseI, int UseOpIdx,
+                                const SIInstrInfo &InstrInfo) {
+  AMDGPU::OpName UseModName;
+  unsigned UseOpcode = UseI->getOpcode();
+  if (AMDGPU::getNamedOperandIdx(UseOpcode, AMDGPU::OpName::src0) == UseOpIdx)
+    UseModName = AMDGPU::OpName::src0_modifiers;
+  else if (AMDGPU::getNamedOperandIdx(UseOpcode, AMDGPU::OpName::src1) ==
+           UseOpIdx)
+    UseModName = AMDGPU::OpName::src1_modifiers;
+  else if (AMDGPU::getNamedOperandIdx(UseOpcode, AMDGPU::OpName::src2) ==
+           UseOpIdx)
+    UseModName = AMDGPU::OpName::src2_modifiers;
+  else
+    return nullptr;
+  return InstrInfo.getNamedOperand(*UseI, UseModName);
+}
+
+// Get the subreg idx of the subreg that is used by the given VOP3P instruction
+// operand, considering the given op_sel and op_sel_hi modifiers.
+static unsigned getUsedVOP3PSubRegIdx(const SIRegisterInfo *TRI,
+                                      const MachineRegisterInfo &MRI,
+                                      const SIInstrInfo &InstrInfo,
+                                      const MachineOperand &Op, int64_t OpSel,
+                                      int64_t OpSelHi) {
+  unsigned RegSize;
+
+  if (InstrInfo.isVOP3PMix(*Op.getParent()))
+    RegSize = OpSelHi ? 32 : 64;
+  else if (unsigned SubRegIdx = Op.getSubReg())
+    RegSize = TRI->getSubRegIdxSize(SubRegIdx);
+  else
+    RegSize = TRI->getRegSizeInBits(Op.getReg(), MRI);
+
+  assert((RegSize == 64 || RegSize == 32) && "unexpected VOP3P operand size");
+
+  switch (RegSize) {
+  case 32:
+    return OpSel ? AMDGPU::hi16 : AMDGPU::lo16;
+  case 64:
+    return OpSel ? AMDGPU::sub1 : AMDGPU::sub0;
+  default:
+    llvm::reportFatalInternalError("currently unsupported VOP3P operand size");
+  }
+}
+
+std::pair<bool, std::optional<Register>>
+GCNSubtarget::getRealSchedDependency(MachineInstr *DefI, int DefOpIdx,
+                                     MachineInstr *UseI, int UseOpIdx) const {
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ro-i wrote:

done

https://github.com/llvm/llvm-project/pull/140255