[llvm] [RISCV] add computeKnownBitsForTargetNode for RISCVISD::SRLW (PR #155995)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp
``````````

:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp b/llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
index f9e341607..f6b8ca725 100644
--- a/llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
+++ b/llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
@@ -87,8 +87,8 @@ TEST_F(RISCVSelectionDAGTest, computeKnownBits_SRLW) {
   //   %c = zext i32 %b to i64 ; makes the most significant 32 bits 0
   //   ret i64 %c
   //  }
-  // The Optimized SelectionDAG as show by llc -mtriple="riscv64" -debug-only=isel-dump 
-  // is:
+  // The Optimized SelectionDAG as show by llc -mtriple="riscv64"
+  // -debug-only=isel-dump is:
   //      t0: ch,glue = EntryToken
   //          t2: i64,ch = CopyFromReg t0, Register:i64 %0
   //        t18: i64 = and t2, Constant:i64<2147483647>

``````````

</details>


https://github.com/llvm/llvm-project/pull/155995