[llvm] [SelectionDAG] Add computeKnownBits for ISD::ROTL/ROTR. (PR #156142)

[Simon Pilgrim via llvm-commits]

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@@ -3850,6 +3850,22 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
     Known = KnownBits::ashr(Known, Known2, /*ShAmtNonZero=*/false,
                             Op->getFlags().hasExact());
     break;
+  case ISD::ROTL:
+  case ISD::ROTR:
+    if (ConstantSDNode *C =
+            isConstOrConstSplat(Op.getOperand(1), DemandedElts)) {
+      unsigned Amt = C->getAPIntValue().urem(BitWidth);
+
+      Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
+
+      // Canonicalize to ROTR.
+      if (Opcode == ISD::ROTL)
+        Amt = BitWidth - Amt;
+
+      Known.Zero = Known.Zero.rotr(Amt);
+      Known.One = Known.One.rotr(Amt);
+    }
+    break;
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RKSimon wrote:

Is it worth adding a general KnownBits::rotl/r handler do you think? Pow2 bitwidths in particular might be known in the bottom log2 bits (all that we care about for urem) but the upper bits might be unknown.

https://github.com/llvm/llvm-project/pull/156142