[llvm] [RISCV][GlobalISel] Lower G_ATOMICRMW_SUB via G_ATOMICRMW_ADD (PR #155972)
Kane Wang via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 29 09:13:19 PDT 2025
================
@@ -4773,6 +4773,15 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
return lowerVectorReduction(MI);
case G_VAARG:
return lowerVAArg(MI);
+ case G_ATOMICRMW_SUB: {
+ auto [Ret, RetLLT, Mem, MemLLT, Val, ValLLT] = MI.getFirst3RegLLTs();
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ReVe1uv wrote:
Yes, after reusing the `Ret` register to avoid creating a new `copy` instruction, should just use `getFirst3Reg`.
https://github.com/llvm/llvm-project/pull/155972
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