[llvm] [AArch64] Add patterns for sub from add negative immediates (PR #156024)

[Paul Walker via llvm-commits]

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@@ -657,6 +657,12 @@ let Predicates = [HasSVE_or_SME] in {
   defm SQSUB_ZI : sve_int_arith_imm0_ssat<0b110, "sqsub", ssubsat, saddsat>;
   defm UQSUB_ZI : sve_int_arith_imm0<0b111, "uqsub", usubsat>;
 
+  // Extra patterns for add(x, splat(-ve)) -> sub(x, +ve). There is no i8
+  // pattern as all i8 constants can be handled by an add.
+  def : SVE_1_Op_Imm_OptLsl_Pat<nxv8i16, add, ZPR16, i32, SVEAddSubNegImm16Pat, SUB_ZI_H>;
+  def : SVE_1_Op_Imm_OptLsl_Pat<nxv4i32, add, ZPR32, i32, SVEAddSubNegImm32Pat, SUB_ZI_S>;
+  def : SVE_1_Op_Imm_OptLsl_Pat<nxv2i64, add, ZPR64, i64, SVEAddSubNegImm64Pat, SUB_ZI_D>;
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paulwalker-arm wrote:

Any objections to moving these into `sve_int_arith_imm0` similar to `sve_int_arith_imm0_ssat`, albeit this time with `inv_op` defaulting to `null_frag`?

https://github.com/llvm/llvm-project/pull/156024