[llvm] [AMDGPU] Fix opcode comparison logic for G_INTRINSIC (PR #156008)

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llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Piotr Balcer (pbalcer)

<details>
<summary>Changes</summary>

The check `(Opc < TargetOpcode::GENERIC_OP_END)` incorrectly includes`TargetOpcode::G_INTRINSIC` (129), which is greater than `GENERIC_OP_END` (313), leading to logically dead code.

This patch reorders the conditionals to first check for `G_INTRINSIC`, ensuring correct handling of the `amdgcn_fdot2` intrinsic.

---
Full diff: https://github.com/llvm/llvm-project/pull/156008.diff


1 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (+4-4) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index fac365d015d95..70be259327023 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -4718,14 +4718,14 @@ class SearchOptions {
     const MachineInstr *MI = MRI.getVRegDef(Reg);
     unsigned Opc = MI->getOpcode();
 
-    if (Opc < TargetOpcode::GENERIC_OP_END) {
-      // Keep same for generic op.
-      HasNeg = true;
-    } else if (Opc == TargetOpcode::G_INTRINSIC) {
+    if (Opc == TargetOpcode::G_INTRINSIC) {
       Intrinsic::ID IntrinsicID = cast<GIntrinsic>(*MI).getIntrinsicID();
       // Only float point intrinsic has neg & neg_hi bits.
       if (IntrinsicID == Intrinsic::amdgcn_fdot2)
         HasNeg = true;
+    } else if (Opc < TargetOpcode::GENERIC_OP_END) {
+      // Keep same for generic op.
+      HasNeg = true;
     }
   }
   bool checkOptions(SrcStatus Stat) const {

``````````

</details>


https://github.com/llvm/llvm-project/pull/156008