[llvm] [RISCV] add computeKnownBitsForTargetNode for RISCVISD::SRLW (PR #155995)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 29 02:33:51 PDT 2025
================
@@ -21276,6 +21276,7 @@ void RISCVTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth) const {
+ errs() << "computeKnownBitsForTargetNode\n";
----------------
RKSimon wrote:
remove your debugging code :)
https://github.com/llvm/llvm-project/pull/155995
More information about the llvm-commits
mailing list