[llvm] [RISCV] Compress shxadd to qc.c.muliadd when rd = rs2 (PR #155843)

[Sam Elliott via llvm-commits]

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@@ -58,3 +58,17 @@ qc.shladd x10, x11, x12, 31
 # CHECK-ENC: encoding: [0xaa,0x21]
 qc.muliadd x10, x11, 16
 
+# CHECK-NOALIAS: qc.c.muliadd    a0, a1, 2
+# CHECK-ALIAS: qc.muliadd    a0, a1, 2
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lenary wrote:

To elaborate a bit: if someone writes `shNadd`, they sort-of know it's a 4-byte instruction. If they run the assembler, then disassemble, and see `qc.muliadd` (another 4-byte instruction), it's more confusing than if they see `qc.c.muliadd` - which is more obviously something that compression has happened to.

https://github.com/llvm/llvm-project/pull/155843