[llvm] ddf8cd3 - [HLSL][DirectX] Remove uniformity bit from resource initialization intrinsics (#155332)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 28 09:12:43 PDT 2025
Author: Helena Kotas
Date: 2025-08-28T09:12:36-07:00
New Revision: ddf8cd3c6c949aa1ce0751d7a16966f612fb3ea4
URL: https://github.com/llvm/llvm-project/commit/ddf8cd3c6c949aa1ce0751d7a16966f612fb3ea4
DIFF: https://github.com/llvm/llvm-project/commit/ddf8cd3c6c949aa1ce0751d7a16966f612fb3ea4.diff
LOG: [HLSL][DirectX] Remove uniformity bit from resource initialization intrinsics (#155332)
Removes uniformity bit from resource initialization intrinsics `llvm.{dx|spv}.resource.handlefrombinding` and `llvm.{dx|spv}.resource.handlefromimplicitbinding`. The flag currently always set to `false`. It should be derived from resource analysis and not provided by codegen.
Closes #135452
Added:
Modified:
clang/lib/CodeGen/CGHLSLBuiltins.cpp
clang/lib/CodeGen/CGHLSLRuntime.cpp
clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl
clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
clang/test/CodeGenHLSL/resources/cbuffer.hlsl
clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
llvm/include/llvm/IR/IntrinsicsDirectX.td
llvm/include/llvm/IR/IntrinsicsSPIRV.td
llvm/lib/Analysis/DXILResource.cpp
llvm/lib/Target/DirectX/DXILOpLowering.cpp
llvm/lib/Target/DirectX/DXILResourceImplicitBinding.cpp
llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
llvm/test/Analysis/DXILResource/buffer-frombinding.ll
llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll
llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll
llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll
llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll
llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll
llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll
llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll
llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
llvm/test/CodeGen/DirectX/BufferLoad.ll
llvm/test/CodeGen/DirectX/BufferLoadDouble.ll
llvm/test/CodeGen/DirectX/BufferLoadInt64.ll
llvm/test/CodeGen/DirectX/BufferStore-errors.ll
llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
llvm/test/CodeGen/DirectX/BufferStore.ll
llvm/test/CodeGen/DirectX/BufferStoreDouble.ll
llvm/test/CodeGen/DirectX/BufferStoreInt64.ll
llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll
llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
llvm/test/CodeGen/DirectX/CreateHandle.ll
llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll
llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll
llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll
llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll
llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll
llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll
llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll
llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll
llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll
llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll
llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll
llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll
llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll
llvm/test/CodeGen/DirectX/RawBufferLoad.ll
llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll
llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll
llvm/test/CodeGen/DirectX/RawBufferStore.ll
llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll
llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll
llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll
llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll
llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll
llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll
llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll
llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll
llvm/test/CodeGen/DirectX/resource_counter_error.ll
llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/MixedBufferLoadStore.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll
llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-1.ll
llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-2.ll
llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access.ll
llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
llvm/unittests/Target/DirectX/ResourceBindingAnalysisTests.cpp
llvm/unittests/Target/DirectX/UniqueResourceFromUseTests.cpp
Removed:
################################################################################
diff --git a/clang/lib/CodeGen/CGHLSLBuiltins.cpp b/clang/lib/CodeGen/CGHLSLBuiltins.cpp
index 58165185b6711..32e930b27c4e0 100644
--- a/clang/lib/CodeGen/CGHLSLBuiltins.cpp
+++ b/clang/lib/CodeGen/CGHLSLBuiltins.cpp
@@ -335,15 +335,9 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
Value *RangeOp = EmitScalarExpr(E->getArg(3));
Value *IndexOp = EmitScalarExpr(E->getArg(4));
Value *Name = EmitScalarExpr(E->getArg(5));
- // FIXME: NonUniformResourceIndex bit is not yet implemented
- // (llvm/llvm-project#135452)
- Value *NonUniform =
- llvm::ConstantInt::get(llvm::Type::getInt1Ty(getLLVMContext()), false);
-
llvm::Intrinsic::ID IntrinsicID =
CGM.getHLSLRuntime().getCreateHandleFromBindingIntrinsic();
- SmallVector<Value *> Args{SpaceOp, RegisterOp, RangeOp,
- IndexOp, NonUniform, Name};
+ SmallVector<Value *> Args{SpaceOp, RegisterOp, RangeOp, IndexOp, Name};
return Builder.CreateIntrinsic(HandleTy, IntrinsicID, Args);
}
case Builtin::BI__builtin_hlsl_resource_handlefromimplicitbinding: {
@@ -353,15 +347,9 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
Value *IndexOp = EmitScalarExpr(E->getArg(3));
Value *OrderID = EmitScalarExpr(E->getArg(4));
Value *Name = EmitScalarExpr(E->getArg(5));
- // FIXME: NonUniformResourceIndex bit is not yet implemented
- // (llvm/llvm-project#135452)
- Value *NonUniform =
- llvm::ConstantInt::get(llvm::Type::getInt1Ty(getLLVMContext()), false);
-
llvm::Intrinsic::ID IntrinsicID =
CGM.getHLSLRuntime().getCreateHandleFromImplicitBindingIntrinsic();
- SmallVector<Value *> Args{OrderID, SpaceOp, RangeOp,
- IndexOp, NonUniform, Name};
+ SmallVector<Value *> Args{OrderID, SpaceOp, RangeOp, IndexOp, Name};
return Builder.CreateIntrinsic(HandleTy, IntrinsicID, Args);
}
case Builtin::BI__builtin_hlsl_all: {
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 12ece217ba563..f32d01ae78658 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -699,8 +699,6 @@ void CGHLSLRuntime::initializeBufferFromBinding(const HLSLBufferDecl *BufDecl,
llvm::GlobalVariable *GV,
HLSLVkBindingAttr *VkBinding) {
assert(VkBinding && "expect a nonnull binding attribute");
- llvm::Type *Int1Ty = llvm::Type::getInt1Ty(CGM.getLLVMContext());
- auto *NonUniform = llvm::ConstantInt::get(Int1Ty, false);
auto *Index = llvm::ConstantInt::get(CGM.IntTy, 0);
auto *RangeSize = llvm::ConstantInt::get(CGM.IntTy, 1);
auto *Set = llvm::ConstantInt::get(CGM.IntTy, VkBinding->getSet());
@@ -709,7 +707,7 @@ void CGHLSLRuntime::initializeBufferFromBinding(const HLSLBufferDecl *BufDecl,
llvm::Intrinsic::ID IntrinsicID =
CGM.getHLSLRuntime().getCreateHandleFromBindingIntrinsic();
- SmallVector<Value *> Args{Set, Binding, RangeSize, Index, NonUniform, Name};
+ SmallVector<Value *> Args{Set, Binding, RangeSize, Index, Name};
initializeBuffer(CGM, GV, IntrinsicID, Args);
}
@@ -717,8 +715,6 @@ void CGHLSLRuntime::initializeBufferFromBinding(const HLSLBufferDecl *BufDecl,
llvm::GlobalVariable *GV,
HLSLResourceBindingAttr *RBA) {
assert(RBA && "expect a nonnull binding attribute");
- llvm::Type *Int1Ty = llvm::Type::getInt1Ty(CGM.getLLVMContext());
- auto *NonUniform = llvm::ConstantInt::get(Int1Ty, false);
auto *Index = llvm::ConstantInt::get(CGM.IntTy, 0);
auto *RangeSize = llvm::ConstantInt::get(CGM.IntTy, 1);
auto *Space = llvm::ConstantInt::get(CGM.IntTy, RBA->getSpaceNumber());
@@ -732,15 +728,13 @@ void CGHLSLRuntime::initializeBufferFromBinding(const HLSLBufferDecl *BufDecl,
// buffer with explicit binding
if (RBA->hasRegisterSlot()) {
auto *RegSlot = llvm::ConstantInt::get(CGM.IntTy, RBA->getSlotNumber());
- SmallVector<Value *> Args{Space, RegSlot, RangeSize,
- Index, NonUniform, Name};
+ SmallVector<Value *> Args{Space, RegSlot, RangeSize, Index, Name};
initializeBuffer(CGM, GV, IntrinsicID, Args);
} else {
// buffer with implicit binding
auto *OrderID =
llvm::ConstantInt::get(CGM.IntTy, RBA->getImplicitBindingOrderID());
- SmallVector<Value *> Args{OrderID, Space, RangeSize,
- Index, NonUniform, Name};
+ SmallVector<Value *> Args{OrderID, Space, RangeSize, Index, Name};
initializeBuffer(CGM, GV, IntrinsicID, Args);
}
}
diff --git a/clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl b/clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
index 3a8d2c03e173c..5db156ed325da 100644
--- a/clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
+++ b/clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
@@ -70,7 +70,7 @@ export void foo() {
// CHECK: define linkonce_odr hidden void @_ZN4hlsl17ByteAddressBufferC2EjjijPKc(ptr noundef nonnull align 4 dereferenceable(4) %this,
// CHECK-SAME: i32 noundef %registerNo, i32 noundef %spaceNo, i32 noundef %range, i32 noundef %index, ptr noundef %name)
// CHECK-DXIL: %[[HANDLE:.*]] = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t(
-// CHECK-DXIL-SAME: i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 false, ptr %{{.*}})
+// CHECK-DXIL-SAME: i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, ptr %{{.*}})
// CHECK-NEXT: %__handle = getelementptr inbounds nuw %"class.hlsl::ByteAddressBuffer", ptr %{{.*}}, i32 0, i32 0
// CHECK-DXIL-NEXT: store target("dx.RawBuffer", i8, 0, 0) %[[HANDLE]], ptr %__handle, align 4
@@ -79,7 +79,7 @@ export void foo() {
// CHECK: define linkonce_odr hidden void @_ZN4hlsl19RWByteAddressBufferC2EjijjPKc(ptr noundef nonnull align 4 dereferenceable(4) %this,
// CHECK-SAME: i32 noundef %spaceNo, i32 noundef %range, i32 noundef %index, i32 noundef %orderId, ptr noundef %name)
// CHECK: %[[HANDLE:.*]] = call target("dx.RawBuffer", i8, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_i8_1_0t
-// CHECK-SAME: (i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 false, ptr %{{.*}})
+// CHECK-SAME: (i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, ptr %{{.*}})
// CHECK-NEXT: %__handle = getelementptr inbounds nuw %"class.hlsl::RWByteAddressBuffer", ptr %this1, i32 0, i32 0
// CHECK-NEXT: store target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], ptr %__handle, align 4
diff --git a/clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl b/clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl
index 114468914e2ea..127498460b039 100644
--- a/clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl
+++ b/clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl
@@ -63,11 +63,11 @@ export void foo() {
// CHECK: call void @_ZN4hlsl8RWBufferIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) %{{.*}})
// Buf1 initialization part 3 - body of RWBuffer<float> C2 constructor with explicit binding that initializes
-// handle with @llvm.dx.resource.handlefrombinding
+// handle with @llvm.dx.resource.handlefrombinding
// CHECK: define linkonce_odr hidden void @_ZN4hlsl8RWBufferIfEC2EjjijPKc(ptr noundef nonnull align 4 dereferenceable(4) %this,
// CHECK-SAME: i32 noundef %registerNo, i32 noundef %spaceNo, i32 noundef %range, i32 noundef %index, ptr noundef %name)
// CHECK-DXIL: %[[HANDLE:.*]] = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(
-// CHECK-DXIL-SAME: i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 false, ptr %{{.*}})
+// CHECK-DXIL-SAME: i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, ptr %{{.*}})
// CHECK-NEXT: %__handle = getelementptr inbounds nuw %"class.hlsl::RWBuffer", ptr %{{.*}}, i32 0, i32 0
// CHECK-DXIL-NEXT: store target("dx.TypedBuffer", float, 1, 0, 0) %[[HANDLE]], ptr %__handle, align 4
@@ -76,7 +76,7 @@ export void foo() {
// CHECK: define linkonce_odr hidden void @_ZN4hlsl8RWBufferIdEC2EjijjPKc(ptr noundef nonnull align 4 dereferenceable(4) %this,
// CHECK-SAME: i32 noundef %spaceNo, i32 noundef %range, i32 noundef %index, i32 noundef %orderId, ptr noundef %name)
// CHECK: %[[HANDLE:.*]] = call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.TypedBuffer_f64_1_0_0t
-// CHECK-SAME: (i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 false, ptr %{{.*}})
+// CHECK-SAME: (i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, ptr %{{.*}})
// CHECK-NEXT: %__handle = getelementptr inbounds nuw %"class.hlsl::RWBuffer.0", ptr %{{.*}}, i32 0, i32 0
// CHECK-NEXT: store target("dx.TypedBuffer", double, 1, 0, 0) %[[HANDLE]], ptr %__handle, align 4
diff --git a/clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl b/clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
index 28841732df99e..91410e600c6e0 100644
--- a/clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
+++ b/clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
@@ -71,7 +71,7 @@ export void foo() {
// CHECK: define linkonce_odr hidden void @_ZN4hlsl16StructuredBufferIfEC2EjjijPKc(ptr noundef nonnull align 4 dereferenceable(4) %this,
// CHECK-SAME: i32 noundef %registerNo, i32 noundef %spaceNo, i32 noundef %range, i32 noundef %index, ptr noundef %name)
// CHECK-DXIL: %[[HANDLE:.*]] = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(
-// CHECK-SAME: i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 false, ptr %{{.*}})
+// CHECK-SAME: i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, ptr %{{.*}})
// CHECK-NEXT: %__handle = getelementptr inbounds nuw %"class.hlsl::StructuredBuffer", ptr %{{.*}}, i32 0, i32 0
// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 0, 0) %[[HANDLE]], ptr %__handle, align 4
@@ -80,7 +80,7 @@ export void foo() {
// CHECK: define linkonce_odr hidden void @_ZN4hlsl18RWStructuredBufferIfEC2EjijjPKc(ptr noundef nonnull align 4 dereferenceable(4) %this,
// CHECK-SAME: i32 noundef %spaceNo, i32 noundef %range, i32 noundef %index, i32 noundef %orderId, ptr noundef %name)
// CHECK: %[[HANDLE:.*]] = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f32_1_0t
-// CHECK-SAME: (i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i1 false, ptr %{{.*}})
+// CHECK-SAME: (i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, ptr %{{.*}})
// CHECK-NEXT: %__handle = getelementptr inbounds nuw %"class.hlsl::RWStructuredBuffer", ptr %{{.*}}, i32 0, i32 0
// CHECK-NEXT: store target("dx.RawBuffer", float, 1, 0) %[[HANDLE]], ptr %__handle, align 4
diff --git a/clang/test/CodeGenHLSL/resources/cbuffer.hlsl b/clang/test/CodeGenHLSL/resources/cbuffer.hlsl
index b58a49b41eb98..8dcff5dad9d13 100644
--- a/clang/test/CodeGenHLSL/resources/cbuffer.hlsl
+++ b/clang/test/CodeGenHLSL/resources/cbuffer.hlsl
@@ -276,61 +276,61 @@ cbuffer CB_C {
// CHECK: define internal void @_init_buffer_CBScalars.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CBScalars.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CBScalars, 56, 0, 8, 16, 24, 32, 36, 40, 48))
-// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBScalarss_56_0_8_16_24_32_36_40_48tt(i32 5, i32 1, i32 1, i32 0, i1 false, ptr @CBScalars.str)
+// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBScalarss_56_0_8_16_24_32_36_40_48tt(i32 5, i32 1, i32 1, i32 0, ptr @CBScalars.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CBScalars, 56, 0, 8, 16, 24, 32, 36, 40, 48)) %CBScalars.cb_h, ptr @CBScalars.cb, align 4
// CHECK: define internal void @_init_buffer_CBVectors.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CBVectors.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CBVectors, 136, 0, 16, 40, 48, 80, 96, 112))
-// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBVectorss_136_0_16_40_48_80_96_112tt(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @CBVectors.str)
+// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBVectorss_136_0_16_40_48_80_96_112tt(i32 0, i32 0, i32 1, i32 0, ptr @CBVectors.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CBVectors, 136, 0, 16, 40, 48, 80, 96, 112)) %CBVectors.cb_h, ptr @CBVectors.cb, align 4
// CHECK: define internal void @_init_buffer_CBArrays.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CBArrays.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CBArrays, 708, 0, 48, 112, 176, 224, 608, 624, 656))
-// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBArrayss_708_0_48_112_176_224_608_624_656tt(i32 0, i32 2, i32 1, i32 0, i1 false, ptr @CBArrays.str)
+// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBArrayss_708_0_48_112_176_224_608_624_656tt(i32 0, i32 2, i32 1, i32 0, ptr @CBArrays.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CBArrays, 708, 0, 48, 112, 176, 224, 608, 624, 656)) %CBArrays.cb_h, ptr @CBArrays.cb, align 4
// CHECK: define internal void @_init_buffer_CBTypedefArray.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CBTypedefArray.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CBTypedefArray, 128, 0, 64))
-// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBTypedefArrays_128_0_64tt(i32 1, i32 2, i32 1, i32 0, i1 false, ptr @CBTypedefArray.str)
+// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBTypedefArrays_128_0_64tt(i32 1, i32 2, i32 1, i32 0, ptr @CBTypedefArray.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CBTypedefArray, 128, 0, 64)) %CBTypedefArray.cb_h, ptr @CBTypedefArray.cb, align 4
// CHECK: define internal void @_init_buffer_CBStructs.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CBStructs.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CBStructs, 246, 0, 16, 32, 64, 144, 238, 240))
-// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBStructss_246_0_16_32_64_144_238_240tt(i32 2, i32 0, i32 1, i32 0, i1 false, ptr @CBStructs.str)
+// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBStructss_246_0_16_32_64_144_238_240tt(i32 2, i32 0, i32 1, i32 0, ptr @CBStructs.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CBStructs, 246, 0, 16, 32, 64, 144, 238, 240)) %CBStructs.cb_h, ptr @CBStructs.cb, align 4
// CHECK: define internal void @_init_buffer_CBClasses.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CBClasses.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CBClasses, 260, 0, 16, 32, 112))
-// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBClassess_260_0_16_32_112tt(i32 3, i32 0, i32 1, i32 0, i1 false, ptr @CBClasses.str)
+// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBClassess_260_0_16_32_112tt(i32 3, i32 0, i32 1, i32 0, ptr @CBClasses.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CBClasses, 260, 0, 16, 32, 112)) %CBClasses.cb_h, ptr @CBClasses.cb, align 4
// CHECK: define internal void @_init_buffer_CBMix.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CBMix.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CBMix, 170, 0, 24, 32, 120, 128, 136, 144, 152, 160, 168))
-// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBMixs_170_0_24_32_120_128_136_144_152_160_168tt(i32 4, i32 0, i32 1, i32 0, i1 false, ptr @CBMix.str)
+// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBMixs_170_0_24_32_120_128_136_144_152_160_168tt(i32 4, i32 0, i32 1, i32 0, ptr @CBMix.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CBMix, 170, 0, 24, 32, 120, 128, 136, 144, 152, 160, 168)) %CBMix.cb_h, ptr @CBMix.cb, align 4
// CHECK: define internal void @_init_buffer_CB_A.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CB_A.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB_A, 188, 0, 32, 76, 80, 120, 128, 144, 160, 182))
-// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CB_As_188_0_32_76_80_120_128_144_160_182tt(i32 5, i32 0, i32 1, i32 0, i1 false, ptr @CB_A.str)
+// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CB_As_188_0_32_76_80_120_128_144_160_182tt(i32 5, i32 0, i32 1, i32 0, ptr @CB_A.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB_A, 188, 0, 32, 76, 80, 120, 128, 144, 160, 182)) %CB_A.cb_h, ptr @CB_A.cb, align 4
// CHECK: define internal void @_init_buffer_CB_B.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CB_B.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB_B, 94, 0, 88))
-// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CB_Bs_94_0_88tt(i32 6, i32 0, i32 1, i32 0, i1 false, ptr @CB_B.str)
+// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CB_Bs_94_0_88tt(i32 6, i32 0, i32 1, i32 0, ptr @CB_B.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB_B, 94, 0, 88)) %CB_B.cb_h, ptr @CB_B.cb, align 4
// CHECK: define internal void @_init_buffer_CB_C.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CB_C.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB_C, 400, 0, 16, 112, 128, 392))
-// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CB_Cs_400_0_16_112_128_392tt(i32 7, i32 0, i32 1, i32 0, i1 false, ptr @CB_C.str)
+// CHECK-SAME: @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_CB_Cs_400_0_16_112_128_392tt(i32 7, i32 0, i32 1, i32 0, ptr @CB_C.str)
// CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB_C, 400, 0, 16, 112, 128, 392)) %CB_C.cb_h, ptr @CB_C.cb, align 4
RWBuffer<float> Buf;
diff --git a/clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl b/clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
index 16d22a5b1fdd4..7bedd63c9f65d 100644
--- a/clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
+++ b/clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
@@ -31,7 +31,7 @@ cbuffer CB : register(b0) {
// CHECK: define internal void @_init_buffer_CB.cb()
// CHECK-NEXT: entry:
// CHECK-NEXT: %CB.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 176, 16, 168, 88))
-// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_176_16_168_88tt(i32 3, i32 1, i32 1, i32 0, i1 false, ptr @CB.str)
+// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_176_16_168_88tt(i32 3, i32 1, i32 1, i32 0, ptr @CB.str)
float foo() {
// CHECK: load float, ptr addrspace(2) @a, align 4
diff --git a/clang/test/CodeGenHLSL/resources/resource-bindings.hlsl b/clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
index 2a6e51d765bd1..27af47e9587cc 100644
--- a/clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
+++ b/clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
@@ -14,28 +14,28 @@
// CHECK: %[[HANDLE:.*]] = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(
-// CHECK-SAME: i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i1 false, ptr %{{.*}})
+// CHECK-SAME: i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, ptr %{{.*}})
// CHECK: %[[HANDLE_PTR:.*]] = getelementptr inbounds nuw %"class.hlsl::RWBuffer", ptr %this{{[0-9]*}}, i32 0, i32 0
// CHECK: store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %[[HANDLE]], ptr %[[HANDLE_PTR]], align 4
RWBuffer<float4> U0S0 : register(u0);
// CHECK: %[[HANDLE:.*]] = call target("dx.TypedBuffer", float, 1, 0, 0)
// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(
-// CHECK-SAME: i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i1 false, ptr %{{.*}})
+// CHECK-SAME: i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, ptr %{{.*}})
// CHECK: %[[HANDLE_PTR:.*]] = getelementptr inbounds nuw %"class.hlsl::RWBuffer.0", ptr %this{{[0-9]*}}, i32 0, i32 0
// CHECK: store target("dx.TypedBuffer", float, 1, 0, 0) %[[HANDLE]], ptr %[[HANDLE_PTR]], align 4
RWBuffer<float> U5S3 : register(u5, space3);
// CHECK: %[[HANDLE:.*]] = call target("dx.RawBuffer", i32, 0, 0)
// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(
-// CHECK-SAME: i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i1 false, ptr %{{.*}})
+// CHECK-SAME: i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, ptr %{{.*}})
// CHECK: %[[HANDLE_PTR:.*]] = getelementptr inbounds nuw %"class.hlsl::StructuredBuffer", ptr %this{{[0-9]*}}, i32 0, i32 0
// CHECK: store target("dx.RawBuffer", i32, 0, 0) %[[HANDLE]], ptr %[[HANDLE_PTR]], align 4
StructuredBuffer<int> T2S2 : register(t2, space2);
// CHECK: %[[HANDLE:.*]] = call target("dx.RawBuffer", %struct.S, 1, 0)
// CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_s_struct.Ss_1_0t(
-// CHECK-SAME: i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i1 false, ptr %{{.*}})
+// CHECK-SAME: i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, ptr %{{.*}})
// CHECK: %[[HANDLE_PTR:.*]] = getelementptr inbounds nuw %"class.hlsl::RWStructuredBuffer", ptr %this{{[0-9]*}}, i32 0, i32 0
// CHECK: store target("dx.RawBuffer", %struct.S, 1, 0) %[[HANDLE]], ptr %[[HANDLE_PTR]], align 4
struct S {
diff --git a/llvm/include/llvm/IR/IntrinsicsDirectX.td b/llvm/include/llvm/IR/IntrinsicsDirectX.td
index 68b31a899003b..5d76c3f8df89d 100644
--- a/llvm/include/llvm/IR/IntrinsicsDirectX.td
+++ b/llvm/include/llvm/IR/IntrinsicsDirectX.td
@@ -24,7 +24,7 @@ def int_dx_flattened_thread_id_in_group : Intrinsic<[llvm_i32_ty], [], [IntrNoMe
def int_dx_resource_handlefrombinding
: DefaultAttrsIntrinsic<
[llvm_any_ty],
- [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty],
[IntrNoMem]>;
// Create resource handle with implicit binding in given register space.
@@ -33,7 +33,7 @@ def int_dx_resource_handlefrombinding
def int_dx_resource_handlefromimplicitbinding
: DefaultAttrsIntrinsic<
[llvm_any_ty],
- [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty],
[IntrNoMem]>;
def int_dx_resource_getpointer
diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
index b5f0cdf479c08..05e54bdbd58e5 100644
--- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
+++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
@@ -138,12 +138,12 @@ def int_spv_rsqrt : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty]
def int_spv_resource_handlefrombinding
: DefaultAttrsIntrinsic<[llvm_any_ty],
[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
- llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ llvm_i32_ty, llvm_ptr_ty],
[IntrNoMem]>;
def int_spv_resource_handlefromimplicitbinding
: DefaultAttrsIntrinsic<[llvm_any_ty],
[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
- llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ llvm_i32_ty, llvm_ptr_ty],
[IntrNoMem]>;
def int_spv_firstbituhigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
diff --git a/llvm/lib/Analysis/DXILResource.cpp b/llvm/lib/Analysis/DXILResource.cpp
index 3a70666029248..b78cc03e34dbc 100644
--- a/llvm/lib/Analysis/DXILResource.cpp
+++ b/llvm/lib/Analysis/DXILResource.cpp
@@ -786,7 +786,7 @@ StringRef dxil::getResourceNameFromBindingCall(CallInst *CI) {
llvm_unreachable("unexpected handle creation intrinsic");
case Intrinsic::dx_resource_handlefrombinding:
case Intrinsic::dx_resource_handlefromimplicitbinding:
- Op = CI->getArgOperand(5);
+ Op = CI->getArgOperand(4);
break;
}
@@ -1010,7 +1010,7 @@ void DXILResourceBindingInfo::populate(Module &M, DXILResourceTypeMap &DRTM) {
cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
int32_t Size =
cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
- Value *Name = CI->getArgOperand(5);
+ Value *Name = CI->getArgOperand(4);
// negative size means unbounded resource array;
// upper bound register overflow should be detected in Sema
diff --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index bd421771e8edb..577b4624458b9 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -220,7 +220,7 @@ class OpLowerer {
removeResourceGlobals(CI);
- auto *NameGlobal = dyn_cast<llvm::GlobalVariable>(CI->getArgOperand(5));
+ auto *NameGlobal = dyn_cast<llvm::GlobalVariable>(CI->getArgOperand(4));
CI->replaceAllUsesWith(Replacement);
CI->eraseFromParent();
@@ -233,6 +233,7 @@ class OpLowerer {
IRBuilder<> &IRB = OpBuilder.getIRB();
Type *Int8Ty = IRB.getInt8Ty();
Type *Int32Ty = IRB.getInt32Ty();
+ Type *Int1Ty = IRB.getInt1Ty();
return replaceFunction(F, [&](CallInst *CI) -> Error {
IRB.SetInsertPoint(CI);
@@ -249,10 +250,13 @@ class OpLowerer {
IndexOp = IRB.CreateAdd(IndexOp,
ConstantInt::get(Int32Ty, Binding.LowerBound));
+ // FIXME: The last argument is a NonUniform flag which needs to be set
+ // based on resource analysis.
+ // https://github.com/llvm/llvm-project/issues/155701
std::array<Value *, 4> Args{
ConstantInt::get(Int8Ty, llvm::to_underlying(RC)),
ConstantInt::get(Int32Ty, Binding.RecordID), IndexOp,
- CI->getArgOperand(4)};
+ ConstantInt::get(Int1Ty, false)};
Expected<CallInst *> OpCall =
OpBuilder.tryCreateOp(OpCode::CreateHandle, Args, CI->getName());
if (Error E = OpCall.takeError())
@@ -267,6 +271,7 @@ class OpLowerer {
[[nodiscard]] bool lowerToBindAndAnnotateHandle(Function &F) {
IRBuilder<> &IRB = OpBuilder.getIRB();
Type *Int32Ty = IRB.getInt32Ty();
+ Type *Int1Ty = IRB.getInt1Ty();
return replaceFunction(F, [&](CallInst *CI) -> Error {
IRB.SetInsertPoint(CI);
@@ -295,7 +300,11 @@ class OpLowerer {
: Binding.LowerBound + Binding.Size - 1;
Constant *ResBind = OpBuilder.getResBind(Binding.LowerBound, UpperBound,
Binding.Space, RC);
- std::array<Value *, 3> BindArgs{ResBind, IndexOp, CI->getArgOperand(4)};
+ // FIXME: The last argument is a NonUniform flag which needs to be set
+ // based on resource analysis.
+ // https://github.com/llvm/llvm-project/issues/155701
+ Constant *NonUniform = ConstantInt::get(Int1Ty, false);
+ std::array<Value *, 3> BindArgs{ResBind, IndexOp, NonUniform};
Expected<CallInst *> OpBind = OpBuilder.tryCreateOp(
OpCode::CreateHandleFromBinding, BindArgs, CI->getName());
if (Error E = OpBind.takeError())
diff --git a/llvm/lib/Target/DirectX/DXILResourceImplicitBinding.cpp b/llvm/lib/Target/DirectX/DXILResourceImplicitBinding.cpp
index 6e69c5ac1d633..b0d9ad8da10e9 100644
--- a/llvm/lib/Target/DirectX/DXILResourceImplicitBinding.cpp
+++ b/llvm/lib/Target/DirectX/DXILResourceImplicitBinding.cpp
@@ -111,8 +111,7 @@ static bool assignBindings(Module &M, DXILResourceBindingInfo &DRBI,
RegSlotOp, /* register slot */
IB.Call->getOperand(2), /* size */
IB.Call->getOperand(3), /* index */
- IB.Call->getOperand(4), /* non-uniform flag */
- IB.Call->getOperand(5)}); /* name */
+ IB.Call->getOperand(4)}); /* name */
IB.Call->replaceAllUsesWith(NewCall);
IB.Call->eraseFromParent();
Changed = true;
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 98c7709acf938..5d2bb8765efbb 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -4276,9 +4276,11 @@ bool SPIRVInstructionSelector::loadHandleBeforePosition(
uint32_t Binding = foldImm(HandleDef.getOperand(3), MRI);
uint32_t ArraySize = foldImm(HandleDef.getOperand(4), MRI);
Register IndexReg = HandleDef.getOperand(5).getReg();
- bool IsNonUniform = ArraySize > 1 && foldImm(HandleDef.getOperand(6), MRI);
+ // FIXME: The IsNonUniform flag needs to be set based on resource analysis.
+ // https://github.com/llvm/llvm-project/issues/155701
+ bool IsNonUniform = false;
std::string Name =
- getStringValueFromReg(HandleDef.getOperand(7).getReg(), *MRI);
+ getStringValueFromReg(HandleDef.getOperand(6).getReg(), *MRI);
bool IsStructuredBuffer = ResType->getOpcode() == SPIRV::OpTypePointer;
MachineIRBuilder MIRBuilder(HandleDef);
diff --git a/llvm/test/Analysis/DXILResource/buffer-frombinding.ll b/llvm/test/Analysis/DXILResource/buffer-frombinding.ll
index d08b68d3768af..aeeb21ebb3201 100644
--- a/llvm/test/Analysis/DXILResource/buffer-frombinding.ll
+++ b/llvm/test/Analysis/DXILResource/buffer-frombinding.ll
@@ -15,7 +15,7 @@
define void @test_typedbuffer() {
; ByteAddressBuffer Buf : register(t8, space1)
%srv0 = call target("dx.RawBuffer", void, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, i1 false, ptr @Zero.str)
+ @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, ptr @Zero.str)
; CHECK: Resource [[SRV0:[0-9]+]]:
; CHECK: Name: Zero
; CHECK: Binding:
@@ -29,7 +29,7 @@ define void @test_typedbuffer() {
; struct S { float4 a; uint4 b; };
; StructuredBuffer<S> Buf : register(t2, space4)
%srv1 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 1, i32 0, i1 false, ptr @One.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 1, i32 0, ptr @One.str)
; CHECK: Resource [[SRV1:[0-9]+]]:
; CHECK: Name: One
; CHECK: Binding:
@@ -44,7 +44,7 @@ define void @test_typedbuffer() {
; Buffer<uint4> Buf[24] : register(t3, space5)
%srv2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 5, i32 3, i32 24, i32 0, i1 false, ptr @Two.str)
+ @llvm.dx.resource.handlefrombinding(i32 5, i32 3, i32 24, i32 0, ptr @Two.str)
; CHECK: Resource [[SRV2:[0-9]+]]:
; CHECK: Name: Two
; CHECK: Binding:
@@ -59,7 +59,7 @@ define void @test_typedbuffer() {
; RWBuffer<int> Buf : register(u7, space2)
%uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1)
- @llvm.dx.resource.handlefrombinding(i32 2, i32 7, i32 1, i32 0, i1 false, ptr @Three.str)
+ @llvm.dx.resource.handlefrombinding(i32 2, i32 7, i32 1, i32 0, ptr @Three.str)
; CHECK: Resource [[UAV0:[0-9]+]]:
; CHECK: Name: Three
; CHECK: Binding:
@@ -77,7 +77,7 @@ define void @test_typedbuffer() {
; RWBuffer<float4> Buf : register(u5, space3)
%uav1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 3, i32 5, i32 1, i32 0, i1 false, ptr @Four.str)
+ @llvm.dx.resource.handlefrombinding(i32 3, i32 5, i32 1, i32 0, ptr @Four.str)
call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %uav1, i8 -1)
; CHECK: Resource [[UAV1:[0-9]+]]:
; CHECK: Name: Four
@@ -97,10 +97,10 @@ define void @test_typedbuffer() {
; RWBuffer<float4> BufferArray[10] : register(u0, space4)
; RWBuffer<float4> Buf = BufferArray[0]
%uav2_1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 0, i32 10, i32 0, i1 false, ptr @Array.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 0, i32 10, i32 0, ptr @Array.str)
; RWBuffer<float4> Buf = BufferArray[5]
%uav2_2 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 0, i32 10, i32 5, i1 false, ptr @Array.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 0, i32 10, i32 5, ptr @Array.str)
call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %uav2_2, i8 1)
; CHECK: Resource [[UAV2:[0-9]+]]:
; CHECK: Name: Array
@@ -119,7 +119,7 @@ define void @test_typedbuffer() {
; RWBuffer<float4> Buf : register(u0, space5)
%uav3 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 5, i32 0, i32 1, i32 0, i1 false, ptr @Five.str)
+ @llvm.dx.resource.handlefrombinding(i32 5, i32 0, i32 1, i32 0, ptr @Five.str)
call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %uav3, i8 -1)
call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %uav3, i8 1)
; CHECK: Resource [[UAV3:[0-9]+]]:
@@ -138,7 +138,7 @@ define void @test_typedbuffer() {
; CHECK: Element Count: 4
%cb0 = call target("dx.CBuffer", {float})
- @llvm.dx.resource.handlefrombinding(i32 1, i32 0, i32 1, i32 0, i1 false, ptr @CB.str)
+ @llvm.dx.resource.handlefrombinding(i32 1, i32 0, i32 1, i32 0, ptr @CB.str)
; CHECK: Resource [[CB0:[0-9]+]]:
; CHECK: Name: CB
; CHECK: Binding:
@@ -151,7 +151,7 @@ define void @test_typedbuffer() {
; CHECK: CBuffer size: 4
%cb1 = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0))
- @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, i1 false, ptr @Constants.str)
+ @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, ptr @Constants.str)
; CHECK: Resource [[CB1:[0-9]+]]:
; CHECK: Name: Constants
; CHECK: Binding:
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll
index 9f87f5bc58f25..261bbe164e5ff 100644
--- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll
+++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll
@@ -13,7 +13,7 @@
define void @test_overlapping() {
entry:
- %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, i1 false, ptr @A.str)
- %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 10, i32 4, i1 false, ptr @B.str)
+ %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, ptr @A.str)
+ %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 10, i32 4, ptr @B.str)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll
index dd50428b4b7a7..f4242f878fbef 100644
--- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll
+++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll
@@ -13,7 +13,7 @@
define void @test_overlapping() {
entry:
- %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, i1 false, ptr @R.str)
- %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, i1 false, ptr @S.str)
+ %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, ptr @R.str)
+ %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, ptr @S.str)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll
index 31b1dbfc595f7..67365ee3b64f7 100644
--- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll
+++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll
@@ -30,16 +30,16 @@ target triple = "dxil-pc-shadermodel6.3-library"
define void @test_overlapping() "hlsl.export" {
entry:
- %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @A.str)
+ %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @A.str)
store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4
- %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, i1 false, ptr @B.str)
+ %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, ptr @B.str)
store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4
- %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, i1 false, ptr @C.str)
+ %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, ptr @C.str)
store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4
- %h4 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @S.str)
+ %h4 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @S.str)
store target("dx.TypedBuffer", float, 1, 0, 0) %h4, ptr @Four, align 4
ret void
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll
index 8ca87089e5e1a..bd8dda7858f9f 100644
--- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll
+++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll
@@ -28,13 +28,13 @@ target triple = "dxil-pc-shadermodel6.3-library"
define void @test_overlapping() "hlsl.export" {
entry:
- %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 5, i32 0, i1 false, ptr @A.str)
+ %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 5, i32 0, ptr @A.str)
store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4
- %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 2, i32 0, i1 false, ptr @B.str)
+ %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 2, i32 0, ptr @B.str)
store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4
- %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 3, i32 4, i1 false, ptr @C.str)
+ %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 3, i32 4, ptr @C.str)
store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4
ret void
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll
index 7f1631703fb45..b047a22db5fb9 100644
--- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll
+++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll
@@ -26,13 +26,13 @@ target triple = "dxil-pc-shadermodel6.3-library"
define void @test_overlapping() "hlsl.export" {
entry:
- %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 1, i32 5, i32 0, i1 false, ptr @A.str)
+ %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 1, i32 5, i32 0, ptr @A.str)
store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4
- %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 2, i32 6, i32 0, i1 false, ptr @B.str)
+ %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 2, i32 6, i32 0, ptr @B.str)
store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4
- %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 6, i32 3, i32 4, i1 false, ptr @C.str)
+ %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 6, i32 3, i32 4, ptr @C.str)
store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4
ret void
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll
index 3c37e639f0ede..a58e85b4159f1 100644
--- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll
+++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll
@@ -17,8 +17,8 @@ target triple = "dxil-pc-shadermodel6.3-library"
define void @test_overlapping() {
entry:
- %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 3, i32 0, i1 false, ptr @A.str)
- %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 4, i32 -1, i32 0, i1 false, ptr @B.str)
- %h3 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 17, i32 1, i32 0, i1 false, ptr @C.str)
+ %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 3, i32 0, ptr @A.str)
+ %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 4, i32 -1, i32 0, ptr @B.str)
+ %h3 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 17, i32 1, i32 0, ptr @C.str)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll
index 25f81dd26b9db..9c52d6ed3486a 100644
--- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll
+++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll
@@ -21,15 +21,15 @@ entry:
; Buffer<double> A[2] : register(t2, space4);
%h0 = call target("dx.TypedBuffer", double, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 2, i32 10, i1 false, ptr @A.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 2, i32 10, ptr @A.str)
; Buffer<double> B : register(t20, space5);
%h1 = call target("dx.TypedBuffer", i64, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, i1 false, ptr @B.str)
+ @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, ptr @B.str)
; Buffer<double> C[] : register(t2, space4);
%h2 = call target("dx.TypedBuffer", double, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, i1 false, ptr @C.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @C.str)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll b/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
index 6f0ef29649761..b433bcee9029c 100644
--- a/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
+++ b/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
@@ -7,7 +7,7 @@ target triple = "dxil-pc-shadermodel6.1-compute"
define void @loadf32_struct(i32 %index) {
%buffer = call target("dx.RawBuffer", float, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle %{{.*}}, i32 %index, i32 0)
%load = call {float, i1}
@@ -23,7 +23,7 @@ define void @loadf32_struct(i32 %index) {
define void @loadv4f32_byte(i32 %offset) {
%buffer = call target("dx.RawBuffer", i8, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle %{{.*}}, i32 %offset, i32 0)
%load = call {<4 x float>, i1}
@@ -39,7 +39,7 @@ define void @loadv4f32_byte(i32 %offset) {
define void @loadnested(i32 %index) {
%buffer = call
target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATAI32:%.*]] = call %dx.types.ResRet.i32 @dx.op.bufferLoad.i32(i32 68, %dx.types.Handle %{{.*}}, i32 %index, i32 0)
%loadi32 = call {i32, i1} @llvm.dx.resource.load.rawbuffer.i32(
diff --git a/llvm/test/CodeGen/DirectX/BufferLoad.ll b/llvm/test/CodeGen/DirectX/BufferLoad.ll
index 589d551d5ae9e..77f56a0f07b08 100644
--- a/llvm/test/CodeGen/DirectX/BufferLoad.ll
+++ b/llvm/test/CodeGen/DirectX/BufferLoad.ll
@@ -11,7 +11,7 @@ define void @loadv4f32() {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; The temporary casts should all have been cleaned up
; CHECK-NOT: %dx.resource.casthandle
@@ -70,7 +70,7 @@ define void @index_dynamic(i32 %bufindex, i32 %elemindex) {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[LOAD:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 %bufindex, i32 undef) #[[#ATTR]]
%load = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer(
@@ -106,7 +106,7 @@ define void @loadf32() {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", float, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]]
%load0 = call {float, i1} @llvm.dx.resource.load.typedbuffer(
@@ -125,7 +125,7 @@ define void @loadv2f32() {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <2 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]]
%data0 = call {<2 x float>, i1} @llvm.dx.resource.load.typedbuffer(
@@ -139,7 +139,7 @@ define void @loadv4f32_checkbit() {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]]
%data0 = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer.f32(
@@ -160,7 +160,7 @@ define void @loadv4i32() {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.i32 @dx.op.bufferLoad.i32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]]
%data0 = call {<4 x i32>, i1} @llvm.dx.resource.load.typedbuffer(
@@ -174,7 +174,7 @@ define void @loadv4f16() {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x half>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f16 @dx.op.bufferLoad.f16(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]]
%data0 = call {<4 x half>, i1} @llvm.dx.resource.load.typedbuffer(
@@ -188,7 +188,7 @@ define void @loadv4i16() {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x i16>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i16_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.i16 @dx.op.bufferLoad.i16(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]]
%data0 = call {<4 x i16>, i1} @llvm.dx.resource.load.typedbuffer(
@@ -202,7 +202,7 @@ define void @loadf64() {
; CHECK: [[B1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 1, i32 1, i32 0, i8 1 }, i32 1, i1 false) #0
%buffer = call target("dx.TypedBuffer", double, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; CHECK: [[BA:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[B1]], %dx.types.ResourceProperties { i32 4106, i32 266 }) #0
%load = call { <2 x i32>, i1 } @llvm.dx.resource.load.typedbuffer(
@@ -218,7 +218,7 @@ define void @loadv2f64() {
; CHECK: [[B1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 1, i32 1, i32 0, i8 1 }, i32 1, i1 false) #0
%buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; CHECK: [[BA:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[B1]], %dx.types.ResourceProperties { i32 4106, i32 522 }) #0
%load = call { <4 x i32>, i1 } @llvm.dx.resource.load.typedbuffer(
diff --git a/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll b/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll
index 25abf2111060c..fb81f5e31ad15 100644
--- a/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll
+++ b/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll
@@ -6,10 +6,10 @@ define void @loadf64() {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", double, 1, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.TypedBuffer", double, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we load an <2 x i32> instead of a double
; CHECK-NOT: call {double, i1} @llvm.dx.resource.load.typedbuffer
@@ -33,10 +33,10 @@ define void @loadv2f64() {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we load an <4 x i32> instead of a double2
; CHECK: [[L0:%.*]] = call { <4 x i32>, i1 }
@@ -65,10 +65,10 @@ define void @loadf64WithCheckBit() {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", double, 1, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.TypedBuffer", double, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we load an <2 x i32> instead of a double
; CHECK-NOT: call {double, i1} @llvm.dx.resource.load.typedbuffer
diff --git a/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll b/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll
index 42c0012ff3475..3107d7e90494f 100644
--- a/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll
+++ b/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll
@@ -5,7 +5,7 @@ target triple = "dxil-pc-shadermodel6.2-compute"
define void @loadi64() {
; CHECK-LABEL: define void @loadi64() {
-; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NEXT: [[TMP1:%.*]] = call { <2 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v2i32.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) [[BUFFER]], i32 0)
; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <2 x i32>, i1 } [[TMP1]], 0
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[TMP2]], i32 0
@@ -16,14 +16,14 @@ define void @loadi64() {
; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]]
; CHECK-NEXT: ret void
;
- %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
%result = call { i64, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0)
ret void
}
define void @loadv2i64() {
; CHECK-LABEL: define void @loadv2i64() {
-; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NEXT: [[TMP1:%.*]] = call { <4 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v4i32.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) [[BUFFER]], i32 0)
; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <4 x i32>, i1 } [[TMP1]], 0
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP2]], i32 0
@@ -42,7 +42,7 @@ define void @loadv2i64() {
; CHECK-NEXT: [[TMP16:%.*]] = insertelement <2 x i64> [[TMP11]], i64 [[TMP15]], i32 1
; CHECK-NEXT: ret void
;
- %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
%result = call { <2 x i64>, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/BufferStore-errors.ll b/llvm/test/CodeGen/DirectX/BufferStore-errors.ll
index 663de830502cb..e8aadbbf54bc2 100644
--- a/llvm/test/CodeGen/DirectX/BufferStore-errors.ll
+++ b/llvm/test/CodeGen/DirectX/BufferStore-errors.ll
@@ -9,7 +9,7 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @storetoomany(<5 x float> %data, i32 %index) "hlsl.export" {
%buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v4f32_1_0_0t.v5f32(
target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %buffer,
diff --git a/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll b/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
index dff28dbde82be..188ac75c5d1ab 100644
--- a/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
+++ b/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
@@ -7,7 +7,7 @@ target triple = "dxil-pc-shadermodel6.1-compute"
define void @storef32_struct(i32 %index, float %data) {
%buffer = call target("dx.RawBuffer", float, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %{{.*}}, i32 %index, i32 0, float %data, float undef, float undef, float undef, i8 1)
call void @llvm.dx.resource.store.rawbuffer.f32(
@@ -21,7 +21,7 @@ define void @storef32_struct(i32 %index, float %data) {
define void @storef32_byte(i32 %offset, float %data) {
%buffer = call target("dx.RawBuffer", i8, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, float %data, float undef, float undef, float undef, i8 1)
call void @llvm.dx.resource.store.rawbuffer.f32(
@@ -35,7 +35,7 @@ define void @storef32_byte(i32 %offset, float %data) {
define void @storev4f32_struct(i32 %index, <4 x float> %data) {
%buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0
; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1
@@ -53,7 +53,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) {
define void @storev4f32_byte(i32 %offset, <4 x float> %data) {
%buffer = call target("dx.RawBuffer", i8, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0
; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1
@@ -71,7 +71,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) {
define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) {
%buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0_0:%.*]] = extractelement <4 x float> %data0, i32 0
; CHECK: [[DATA0_1:%.*]] = extractelement <4 x float> %data0, i32 1
@@ -98,7 +98,7 @@ define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) {
define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half> %data2) {
%buffer = call
target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: call void @dx.op.bufferStore.i32(i32 69, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i32 %data0, i32 undef, i32 undef, i32 undef, i8 1)
call void @llvm.dx.resource.store.rawbuffer.i32(
diff --git a/llvm/test/CodeGen/DirectX/BufferStore.ll b/llvm/test/CodeGen/DirectX/BufferStore.ll
index 39d578edb42e3..bd225686fedbe 100644
--- a/llvm/test/CodeGen/DirectX/BufferStore.ll
+++ b/llvm/test/CodeGen/DirectX/BufferStore.ll
@@ -9,7 +9,7 @@ define void @storefloats(<4 x float> %data, i32 %index) {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; The temporary casts should all have been cleaned up
; CHECK-NOT: %dx.resource.casthandle
@@ -33,7 +33,7 @@ define void @storeonefloat(float %data, i32 %index) {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", float, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; The temporary casts should all have been cleaned up
; CHECK-NOT: %dx.resource.casthandle
@@ -53,7 +53,7 @@ define void @storetwofloat(<2 x float> %data, i32 %index) {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <2 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f32_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; The temporary casts should all have been cleaned up
; CHECK-NOT: %dx.resource.casthandle
@@ -75,7 +75,7 @@ define void @storeint(<4 x i32> %data, i32 %index) {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x i32>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i32_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0_0:%.*]] = extractelement <4 x i32> %data, i32 0
; CHECK: [[DATA0_1:%.*]] = extractelement <4 x i32> %data, i32 1
@@ -96,7 +96,7 @@ define void @storehalf(<4 x half> %data, i32 %index) {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; The temporary casts should all have been cleaned up
; CHECK-NOT: %dx.resource.casthandle
@@ -120,7 +120,7 @@ define void @storei16(<4 x i16> %data, i32 %index) {
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x i16>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i16_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; The temporary casts should all have been cleaned up
; CHECK-NOT: %dx.resource.casthandle
@@ -144,7 +144,7 @@ define void @store_scalarized_floats(float %data0, float %data1, float %data2, f
; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
%buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; We shouldn't end up with any inserts/extracts.
; CHECK-NOT: insertelement
@@ -168,7 +168,7 @@ define void @storef64(<2 x i32> %0) {
%buffer = tail call target("dx.TypedBuffer", double, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; The temporary casts should all have been cleaned up
; CHECK-NOT: %dx.resource.casthandle
@@ -187,7 +187,7 @@ define void @storev2f64(<4 x i32> %0) {
%buffer = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; The temporary casts should all have been cleaned up
; CHECK-NOT: %dx.resource.casthandle
diff --git a/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll b/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll
index 9c3dab0cc1e46..35c6f7ef537b4 100644
--- a/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll
+++ b/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll
@@ -5,10 +5,10 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @storef64(double %0) {
; CHECK: [[B:%.*]] = tail call target("dx.TypedBuffer", double, 1, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.TypedBuffer", double, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we split the double and store the lo and hi bits
; CHECK: [[SD:%.*]] = call { i32, i32 } @llvm.dx.splitdouble.i32(double %0)
@@ -28,10 +28,10 @@ define void @storef64(double %0) {
define void @storev2f64(<2 x double> %0) {
; CHECK: [[B:%.*]] = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[SD:%.*]] = call { <2 x i32>, <2 x i32> }
; CHECK-SAME: @llvm.dx.splitdouble.v2i32(<2 x double> %0)
diff --git a/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll b/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll
index c97a02d1873a0..1241701dbb78b 100644
--- a/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll
+++ b/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll
@@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @storei64(i64 %0) {
; CHECK-LABEL: define void @storei64(
; CHECK-SAME: i64 [[TMP0:%.*]]) {
-; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP0]] to i32
; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP0]], 32
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32
@@ -15,7 +15,7 @@ define void @storei64(i64 %0) {
; CHECK-NEXT: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_i64_1_0_0t.v2i32(target("dx.TypedBuffer", i64, 1, 0, 0) [[BUFFER]], i32 0, <2 x i32> [[TMP6]])
; CHECK-NEXT: ret void
;
- %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0,i64 %0)
ret void
}
@@ -24,7 +24,7 @@ define void @storei64(i64 %0) {
define void @storev2i64(<2 x i64> %0) {
; CHECK-LABEL: define void @storev2i64(
; CHECK-SAME: <2 x i64> [[TMP0:%.*]]) {
-; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i64> [[TMP0]] to <2 x i32>
; CHECK-NEXT: [[TMP3:%.*]] = lshr <2 x i64> [[TMP0]], splat (i64 32)
; CHECK-NEXT: [[TMP4:%.*]] = trunc <2 x i64> [[TMP3]] to <2 x i32>
@@ -32,7 +32,7 @@ define void @storev2i64(<2 x i64> %0) {
; CHECK-NEXT: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t.v4i32(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) [[BUFFER]], i32 0, <4 x i32> [[TMP13]])
; CHECK-NEXT: ret void
;
- %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0, <2 x i64> %0)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
index bb0bcc5296c34..52ad0f3df1aba 100644
--- a/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
+++ b/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
@@ -13,7 +13,7 @@
; CHECK: define void @f
define void @f(ptr %dst) {
entry:
- %CB.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_36_0tt(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %CB.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_36_0tt(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) %CB.cb_h, ptr @CB.cb, align 4
; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb
diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
index b4493bbd61f07..db4e14c1336a6 100644
--- a/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
+++ b/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
@@ -27,7 +27,7 @@
; CHECK: define void @f
define void @f(ptr %dst) {
entry:
- %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) %CB.cb_h.i.i, ptr @CB.cb, align 4
; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb
diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
index 001f3320137a6..a78fdd5037f93 100644
--- a/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
+++ b/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
@@ -25,7 +25,7 @@
; CHECK: define void @f(
define void @f(ptr %dst) {
entry:
- %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) %CB.cb_h.i.i, ptr @CB.cb, align 4
%a1.copy = alloca [3 x float], align 4
diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
index f062b3e859628..7857c25d69636 100644
--- a/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
+++ b/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
@@ -25,7 +25,7 @@
; CHECK: define void @f
define void @f(ptr %dst) {
entry:
- %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) %CB.cb_h.i.i, ptr @CB.cb, align 4
; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb
diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
index f46c91f3ef5fb..4160008a986af 100644
--- a/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
+++ b/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
@@ -23,7 +23,7 @@
; CHECK: define void @f
define void @f(ptr %dst) {
entry:
- %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) %CB.cb_h.i.i, ptr @CB.cb, align 4
; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb
diff --git a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
index 7fe6e038fa7e1..71dcf11b9dc88 100644
--- a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
+++ b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
@@ -12,7 +12,7 @@ declare void @f16_user(half)
; CHECK-SAME: Type mismatch between intrinsic and DXIL op
define void @four64() "hlsl.export" {
%buffer = call target("dx.CBuffer", target("dx.Layout", {double}, 8, 0))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {double, double, double, double} @llvm.dx.resource.load.cbufferrow.4(
target("dx.CBuffer", target("dx.Layout", {double}, 8, 0)) %buffer,
@@ -29,7 +29,7 @@ define void @four64() "hlsl.export" {
; CHECK-SAME: Type mismatch between intrinsic and DXIL op
define void @two32() "hlsl.export" {
%buffer = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, float} @llvm.dx.resource.load.cbufferrow.2(
target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) %buffer,
diff --git a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
index c2df5efb69edc..d6906516b716d 100644
--- a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
+++ b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
@@ -9,7 +9,7 @@ declare void @f16_user(half)
; CHECK-LABEL: define void @loadf32
define void @loadf32() {
%buffer = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f32 @dx.op.cbufferLoadLegacy.f32(i32 59, %dx.types.Handle %{{.*}}, i32 0)
%load = call {float, float, float, float} @llvm.dx.resource.load.cbufferrow.4(
@@ -28,7 +28,7 @@ define void @loadf32() {
define void @loadf64() {
%buffer = call
target("dx.CBuffer", target("dx.Layout", {double, double, double, double}, 64, 0, 8, 16, 24))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f64 @dx.op.cbufferLoadLegacy.f64(i32 59, %dx.types.Handle %{{.*}}, i32 1)
%load = call {double, double} @llvm.dx.resource.load.cbufferrow.2(
@@ -47,7 +47,7 @@ define void @loadf64() {
define void @loadf16() {
%buffer = call
target("dx.CBuffer", target("dx.Layout", {half}, 2, 0))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f16.8 @dx.op.cbufferLoadLegacy.f16(i32 59, %dx.types.Handle %{{.*}}, i32 0)
%load = call {half, half, half, half, half, half, half, half} @llvm.dx.resource.load.cbufferrow.8(
diff --git a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll
index aad1f92e4a5a6..bcf82a67a55df 100644
--- a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll
+++ b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll
@@ -14,12 +14,12 @@ target triple = "dxil-unknown-shadermodel6.0-compute"
define void @main() #0 {
%uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0t(
- i32 2, i32 7, i32 1, i32 0, i1 false, ptr null)
+ i32 2, i32 7, i32 1, i32 0, ptr null)
%srv0 = call target("dx.RawBuffer", i8, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t(
- i32 1, i32 8, i32 1, i32 0, i1 false, ptr null)
+ i32 1, i32 8, i32 1, i32 0, ptr null)
%cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0))
- @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
index 8533ab2478db0..bea03102e4ccf 100644
--- a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
+++ b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
@@ -15,7 +15,7 @@ define void @main() #0 {
; CHECK: Flags:
; CHECK: UsedByAtomic64: false
%cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0))
- @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, ptr null)
; ByteAddressBuffer Buf : register(t8, space1)
; CHECK: - Type: SRVRaw
@@ -27,7 +27,7 @@ define void @main() #0 {
; CHECK: UsedByAtomic64: false
%srv0 = call target("dx.RawBuffer", i8, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t(
- i32 1, i32 8, i32 1, i32 0, i1 false, ptr null)
+ i32 1, i32 8, i32 1, i32 0, ptr null)
; struct S { float4 a; uint4 b; };
; StructuredBuffer<S> Buf : register(t2, space4)
@@ -40,7 +40,7 @@ define void @main() #0 {
; CHECK: UsedByAtomic64: false
%srv1 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t(
- i32 4, i32 2, i32 1, i32 0, i1 false, ptr null)
+ i32 4, i32 2, i32 1, i32 0, ptr null)
; Buffer<uint4> Buf[24] : register(t3, space5)
; CHECK: - Type: SRVTyped
@@ -52,7 +52,7 @@ define void @main() #0 {
; CHECK: UsedByAtomic64: false
%srv2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0t(
- i32 5, i32 3, i32 24, i32 0, i1 false, ptr null)
+ i32 5, i32 3, i32 24, i32 0, ptr null)
; RWBuffer<int> Buf : register(u7, space2)
; CHECK: - Type: UAVTyped
@@ -64,7 +64,7 @@ define void @main() #0 {
; CHECK: UsedByAtomic64: false
%uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0t(
- i32 2, i32 7, i32 1, i32 0, i1 false, ptr null)
+ i32 2, i32 7, i32 1, i32 0, ptr null)
; RWBuffer<float4> Buf : register(u5, space3)
; CHECK: - Type: UAVTyped
@@ -76,7 +76,7 @@ define void @main() #0 {
; CHECK: UsedByAtomic64: false
%uav1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0(
- i32 3, i32 5, i32 1, i32 0, i1 false, ptr null)
+ i32 3, i32 5, i32 1, i32 0, ptr null)
; RWBuffer<float4> BufferArray[10] : register(u0, space4)
; CHECK: - Type: UAVTyped
@@ -89,11 +89,11 @@ define void @main() #0 {
; RWBuffer<float4> Buf = BufferArray[0]
%uav2_1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0(
- i32 4, i32 0, i32 10, i32 0, i1 false, ptr null)
+ i32 4, i32 0, i32 10, i32 0, ptr null)
; RWBuffer<float4> Buf = BufferArray[5]
%uav2_2 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0(
- i32 4, i32 0, i32 10, i32 5, i1 false, ptr null)
+ i32 4, i32 0, i32 10, i32 5, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/CreateHandle.ll b/llvm/test/CodeGen/DirectX/CreateHandle.ll
index c471fb07c26af..6cca501bb2568 100644
--- a/llvm/test/CodeGen/DirectX/CreateHandle.ll
+++ b/llvm/test/CodeGen/DirectX/CreateHandle.ll
@@ -25,14 +25,14 @@ define void @test_buffers() {
; RWBuffer<float4> Buf : register(u5, space3)
%typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0(
- i32 3, i32 5, i32 1, i32 0, i1 false, ptr @BufA.str)
+ i32 3, i32 5, i32 1, i32 0, ptr @BufA.str)
; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 1, i32 5, i1 false) #[[#ATTR:]]
; CHECK-NOT: @llvm.dx.cast.handle
; RWBuffer<int> Buf : register(u7, space2)
%typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_1t(
- i32 2, i32 7, i32 1, i32 0, i1 false, ptr null)
+ i32 2, i32 7, i32 1, i32 0, ptr null)
; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 0, i32 7, i1 false) #[[#ATTR]]
; Buffer<uint4> Buf[24] : register(t3, space5)
@@ -40,20 +40,20 @@ define void @test_buffers() {
; Note that the index below is 3 + 4 = 7
%typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0_0t(
- i32 5, i32 3, i32 24, i32 4, i1 false, ptr @BufB.str)
+ i32 5, i32 3, i32 24, i32 4, ptr @BufB.str)
; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 3, i32 7, i1 false) #[[#ATTR]]
; struct S { float4 a; uint4 b; };
; StructuredBuffer<S> Buf : register(t2, space4)
%struct0 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t(
- i32 4, i32 2, i32 1, i32 0, i1 true, ptr null)
- ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 2, i32 2, i1 true) #[[#ATTR]]
+ i32 4, i32 2, i32 1, i32 0, ptr null)
+ ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 2, i32 2, i1 false) #[[#ATTR]]
; ByteAddressBuffer Buf : register(t8, space1)
%byteaddr0 = call target("dx.RawBuffer", i8, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t(
- i32 1, i32 8, i32 1, i32 0, i1 false, ptr null)
+ i32 1, i32 8, i32 1, i32 0, ptr null)
; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 1, i32 8, i1 false) #[[#ATTR]]
; Buffer<float4> Buf[] : register(t7)
@@ -61,7 +61,7 @@ define void @test_buffers() {
%typed3_ix = call i32 @some_val()
%typed3 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0t(
- i32 0, i32 7, i32 -1, i32 %typed3_ix, i1 false, ptr null)
+ i32 0, i32 7, i32 -1, i32 %typed3_ix, ptr null)
; CHECK: %[[IX:.*]] = add i32 %typed3_ix, 7
; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 0, i32 %[[IX]], i1 false) #[[#ATTR]]
diff --git a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
index 4af5d41897512..38f2de28dbe59 100644
--- a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
+++ b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
@@ -26,14 +26,14 @@ define void @test_bindings() {
; RWBuffer<float4> Buf : register(u5, space3)
%typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0(
- i32 3, i32 5, i32 1, i32 0, i1 false, ptr @BufA.str)
+ i32 3, i32 5, i32 1, i32 0, ptr @BufA.str)
; CHECK: [[BUF0:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 5, i32 5, i32 3, i8 1 }, i32 5, i1 false) #[[#ATTR:]]
; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF0]], %dx.types.ResourceProperties { i32 4106, i32 1033 }) #[[#ATTR]]
; RWBuffer<int> Buf : register(u7, space2)
%typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(
- i32 2, i32 7, i32 1, i32 0, i1 false, ptr null)
+ i32 2, i32 7, i32 1, i32 0, ptr null)
; CHECK: [[BUF1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 7, i32 7, i32 2, i8 1 }, i32 7, i1 false) #[[#ATTR]]
; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF1]], %dx.types.ResourceProperties { i32 4106, i32 260 }) #[[#ATTR]]
@@ -42,7 +42,7 @@ define void @test_bindings() {
; Note that the index below is 3 + 4 = 7
%typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0_0t(
- i32 5, i32 3, i32 24, i32 4, i1 false, ptr @BufB.str)
+ i32 5, i32 3, i32 24, i32 4, ptr @BufB.str)
; CHECK: [[BUF2:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 3, i32 26, i32 5, i8 0 }, i32 7, i1 false) #[[#ATTR]]
; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF2]], %dx.types.ResourceProperties { i32 10, i32 1029 }) #[[#ATTR]]
@@ -50,14 +50,14 @@ define void @test_bindings() {
; StructuredBuffer<S> Buf : register(t2, space4)
%struct0 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t(
- i32 4, i32 2, i32 1, i32 0, i1 true, ptr null)
- ; CHECK: [[BUF3:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 2, i32 2, i32 4, i8 0 }, i32 2, i1 true) #[[#ATTR]]
+ i32 4, i32 2, i32 1, i32 0, ptr null)
+ ; CHECK: [[BUF3:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 2, i32 2, i32 4, i8 0 }, i32 2, i1 false) #[[#ATTR]]
; CHECK: = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF3]], %dx.types.ResourceProperties { i32 1036, i32 32 }) #[[#ATTR]]
; ByteAddressBuffer Buf : register(t8, space1)
%byteaddr0 = call target("dx.RawBuffer", i8, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t(
- i32 1, i32 8, i32 1, i32 0, i1 false, ptr null)
+ i32 1, i32 8, i32 1, i32 0, ptr null)
; CHECK: [[BUF4:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 8, i32 8, i32 1, i8 0 }, i32 8, i1 false) #[[#ATTR]]
; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF4]], %dx.types.ResourceProperties { i32 11, i32 0 }) #[[#ATTR]]
@@ -66,14 +66,14 @@ define void @test_bindings() {
%typed3_ix = call i32 @some_val()
%typed3 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0t(
- i32 0, i32 7, i32 -1, i32 %typed3_ix, i1 false, ptr null)
+ i32 0, i32 7, i32 -1, i32 %typed3_ix, ptr null)
; CHECK: %[[IX:.*]] = add i32 %typed3_ix, 7
; CHECK: [[BUF5:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 7, i32 -1, i32 0, i8 0 }, i32 %[[IX]], i1 false) #[[#ATTR]]
; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF5]], %dx.types.ResourceProperties { i32 10, i32 1033 }) #[[#ATTR]]
; cbuffer cb0 : register(b0) { int4 i; float4 f; }
%cb0 = call target("dx.CBuffer", target("dx.Layout", {<4 x i32>, <4 x float>}, 32, 0, 16))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[BUF6:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 0, i32 0, i32 0, i8 2 }, i32 0, i1 false) #[[#ATTR]]
; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF6]], %dx.types.ResourceProperties { i32 13, i32 32 }) #[[#ATTR]]
diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll
index 9ff4b6fb9001d..61d346ccb3edc 100644
--- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll
+++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll
@@ -8,7 +8,7 @@
define float @f() {
entry:
%buf = alloca target("dx.RawBuffer", <4 x float>, 1, 0), align 4
- %h = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %h = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.RawBuffer", <4 x float>, 1, 0) %h, ptr %buf, align 4
%b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr %buf, align 4
diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll
index e8cfa5ac5b433..326d3adc7561a 100644
--- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll
+++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll
@@ -7,9 +7,9 @@
define float @f() {
entry:
- %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.RawBuffer", <4 x float>, 1, 0) %h1, ptr @Buf, align 4
- %h2 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ %h2 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null)
store target("dx.RawBuffer", <4 x float>, 1, 0) %h2, ptr @Buf, align 4
%b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr @Buf, align 4
diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll
index a7c5362123d12..2c6e5aefea7ce 100644
--- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll
+++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll
@@ -13,13 +13,13 @@ entry:
%Index.addr.i2 = alloca i32, align 4
%this.addr.i = alloca ptr, align 4
%Index.addr.i = alloca i32, align 4
- ; CHECK: [[IN:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
- %_ZL2In_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK: [[IN:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
+ %_ZL2In_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.RawBuffer", <4 x float>, 1, 0) %_ZL2In_h.i.i, ptr @_ZL2In, align 4
store ptr @_ZL2In, ptr %this.addr.i.i, align 4
%this1.i.i = load ptr, ptr %this.addr.i.i, align 4
- ; CHECK: [[OUT:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null)
- %_ZL3Out_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK: [[OUT:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, ptr null)
+ %_ZL3Out_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, ptr null)
store target("dx.RawBuffer", <4 x float>, 1, 0) %_ZL3Out_h.i.i, ptr @_ZL3Out, align 4
store ptr @_ZL3Out, ptr %this.addr.i.i.i, align 4
%this1.i.i.i = load ptr, ptr %this.addr.i.i.i, align 4
diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll
index c0db80c4d9a17..ca3c9427617a6 100644
--- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll
+++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll
@@ -10,9 +10,9 @@
define void @main() local_unnamed_addr #1 {
entry:
; CHECK: [[CB:%.*]] = tail call target({{.*}}) @llvm.dx.resource.handlefrombinding
- %h = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %h = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) %h, ptr @CB.cb, align 4
- %_ZL3Out_h.i.i = tail call target("dx.RawBuffer", %struct.Scalars, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %_ZL3Out_h.i.i = tail call target("dx.RawBuffer", %struct.Scalars, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: load target({{.*}}), ptr @CB.cb
%cb = load target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)), ptr @CB.cb, align 4
; CHECK: call { float, float, float, float } @llvm.dx.resource.load.cbufferrow.4.{{.*}}(target({{.*}}) [[CB]], i32 0)
@@ -21,7 +21,7 @@ entry:
call void @llvm.dx.resource.store.rawbuffer(target("dx.RawBuffer", %struct.Scalars, 1, 0) %_ZL3Out_h.i.i, i32 0, i32 0, float %1)
; CHECK: [[CB2:%.*]] = tail call target({{.*}}) @llvm.dx.resource.handlefromimplicitbinding
- %h2 = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %h2 = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 1, i32 0, ptr null)
store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) %h2, ptr @CB2.cb, align 4
; CHECK-NOT: load target({{.*}}), ptr @CB2.cb
%cb2 = load target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)), ptr @CB2.cb, align 4
diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll
index 6bfe28c3f16b2..32c59e726004c 100644
--- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll
+++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll
@@ -9,7 +9,7 @@ define void @f() {
entry:
%b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr @Buf, align 4
- %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.RawBuffer", <4 x float>, 1, 0) %h1, ptr @Buf, align 4
ret void
diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll
index 13ab0352b2a40..3775491f028d4 100644
--- a/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll
+++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll
@@ -12,34 +12,34 @@ define void @test_arrays() {
; RWBuffer<float> A : register(u2);
%bufA = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null)
; no change to llvm.dx.resource.handlefrombinding
; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 1, i32 0, ptr null)
; RWBuffer<float> E[2];
%bufE = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 30, i32 0, i32 5, i32 4, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 30, i32 0, i32 5, i32 4, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 7, i32 5, i32 4, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 7, i32 5, i32 4, ptr null)
; RWBuffer<float> B[4];
%bufB = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 2, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 2, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 2, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 2, ptr null)
; RWBuffer<int> C[2];
%bufC = call target("dx.TypedBuffer", i32, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 20, i32 0, i32 2, i32 1, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 20, i32 0, i32 2, i32 1, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 0, i32 2, i32 1, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 0, i32 2, i32 1, ptr null)
; another access to resource array B to make sure it gets the same binding
%bufB2 = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding
ret void
diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll
index 2403561f3e1c0..33a967e8222af 100644
--- a/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll
+++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll
@@ -14,40 +14,40 @@ define void @test_many_spaces() {
; RWBuffer<float> A : register(u5);
%bufA = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null)
; no change to llvm.dx.resource.handlefrombinding
; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 5, i32 1, i32 0, ptr null)
; RWBuffer<int> B[];
%bufB = call target("dx.TypedBuffer", i32, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, ptr null)
; RWBuffer<float> C[4] : register(space5);
%bufC = call target("dx.TypedBuffer", i32, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 5, i32 4, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 5, i32 4, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 0, i32 4, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 0, i32 4, i32 0, ptr null)
; RWBuffer<int> D[] : register(space5);
%bufD = call target("dx.TypedBuffer", i32, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 102, i32 5, i32 -1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 102, i32 5, i32 -1, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 4, i32 -1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 4, i32 -1, i32 0, ptr null)
; RWBuffer<float> E[3] : register(space10); // gets u0, space10
%bufE = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 103, i32 10, i32 4, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 103, i32 10, i32 4, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 10, i32 0, i32 4, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 10, i32 0, i32 4, i32 0, ptr null)
; StructuredBuffer<int> F : register(space3); // gets t0 in space3
%bufF = call target("dx.RawBuffer", i32, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 104, i32 3, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 104, i32 3, i32 1, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.RawBuffer", i32, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 3, i32 0, i32 1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 3, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding
ret void
diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll
index a05680fc6153d..1137a11aa04c3 100644
--- a/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll
+++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll
@@ -6,22 +6,22 @@ define void @test_simple_binding() {
; StructuredBuffer<float> A : register(t1);
%bufA = call target("dx.RawBuffer", float, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null)
; no change to llvm.dx.resource.handlefrombinding
; CHECK: %bufA = call target("dx.RawBuffer", float, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 1, i32 1, i32 0, ptr null)
; StructuredBuffer<float> B; // gets register(t0, space0)
%bufB = call target("dx.RawBuffer", float, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 5, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 5, i32 0, i32 1, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.RawBuffer", float, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
; StructuredBuffer<float> C; // gets register(t2, space0)
%bufC = call target("dx.RawBuffer", float, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 6, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 6, i32 0, i32 1, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.RawBuffer", float, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 2, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding
diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll
index 0db47b22f8e6d..f02302529e1ee 100644
--- a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll
+++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll
@@ -15,19 +15,19 @@ define void @test_many_spaces() {
; RWBuffer<float> A : register(u1);
%bufA = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null)
; RWBuffer<float> B[];
%bufB = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null)
; RWBuffer<int> C : register(u5);
%bufC = call target("dx.TypedBuffer", i32, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null)
; RWBuffer<float> D[4];
%bufD = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 4, i32 1, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 4, i32 1, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll
index b6ab3fd5ecb02..8838f304ffa3f 100644
--- a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll
+++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll
@@ -12,29 +12,29 @@ define void @test_unbounded_arrays() {
; RWBuffer<float> A : register(u1);
%bufA = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null)
; no change to llvm.dx.resource.handlefrombinding
; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 1, i32 1, i32 0, ptr null)
; RWBuffer<float> B[];
%bufB = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, ptr null)
; RWBuffer<int> C : register(u5);
%bufC = call target("dx.TypedBuffer", i32, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null)
; no change to llvm.dx.resource.handlefrombinding
; CHECK: %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 5, i32 1, i32 0, ptr null)
; ; RWBuffer<float> D[3];
%bufD = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 3, i32 1, i1 false, ptr null)
+ @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 3, i32 1, ptr null)
; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0)
-; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 3, i32 1, i1 false, ptr null)
+; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 3, i32 1, ptr null)
; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding
ret void
diff --git a/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll b/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
index b88ac118b3568..e2a1c09c13038 100644
--- a/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
+++ b/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
@@ -8,7 +8,7 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @cbuffer_is_only_binding() {
%cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0))
- @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, ptr null)
; CHECK: %CBuffer = type { float }
ret void
diff --git a/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll
index 2699d9ae6e8c1..45fc0d9416e53 100644
--- a/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll
+++ b/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll
@@ -34,7 +34,7 @@ define void @test() #0 {
; int2 d;
; }
%CB1.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB1, 24, 0, 4, 8, 16))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @CB1.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @CB1.str)
; cbuffer CB2 : register(b0) {
; float a;
; double b;
@@ -46,7 +46,7 @@ define void @test() #0 {
;}
%CB2.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 36, 0, 8, 16, 20, 22, 24, 32))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @CB2.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @CB2.str)
; cbuffer CB3 : register(b5) {
; double B0;
; float3 B1;
@@ -59,7 +59,7 @@ define void @test() #0 {
; half3 B8;
; }
%CB3.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_MyConstants, 96, 0, 16, 28, 32, 56, 64, 80, 84, 90))
- @llvm.dx.resource.handlefrombinding(i32 15, i32 5, i32 1, i32 0, i1 false, ptr @MyConstants.str)
+ @llvm.dx.resource.handlefrombinding(i32 15, i32 5, i32 1, i32 0, ptr @MyConstants.str)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll b/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
index 440457b3d415e..4f13f4789cd66 100644
--- a/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
+++ b/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
@@ -10,27 +10,27 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @test() {
; Buffer<float4>
%float4 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @A.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @A.str)
; CHECK: %"Buffer<float4>" = type { <4 x float> }
; Buffer<int>
%int = call target("dx.TypedBuffer", i32, 0, 0, 1)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null)
; CHECK: %"Buffer<int32_t>" = type { i32 }
; Buffer<uint3>
%uint3 = call target("dx.TypedBuffer", <3 x i32>, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null)
; CHECK: %"Buffer<uint32_t3>" = type { <3 x i32> }
; StructuredBuffer<S>
%struct0 = call target("dx.RawBuffer", %struct.S, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 10, i32 1, i32 0, i1 true, ptr @SB.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 10, i32 1, i32 0, ptr @SB.str)
; CHECK: %"StructuredBuffer<struct.S>" = type { %struct.S }
; ByteAddressBuffer
%byteaddr = call target("dx.RawBuffer", i8, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 20, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 20, i32 1, i32 0, ptr null)
; CHECK: %ByteAddressBuffer = type { i32 }
ret void
diff --git a/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll
index 86d69abc75760..a2059beeb0acb 100644
--- a/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll
+++ b/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll
@@ -35,54 +35,54 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @test() #0 {
; Buffer<half4> Zero : register(t0)
%Zero_h = call target("dx.TypedBuffer", <4 x half>, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @Zero.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @Zero.str)
; Buffer<float4> One : register(t1)
%One_h = call target("dx.TypedBuffer", <2 x float>, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @One.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @One.str)
; Buffer<double> Two : register(t2);
%Two_h = call target("dx.TypedBuffer", double, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr @Two.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr @Two.str)
; Buffer<int4> Three : register(t3);
%Three_h = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 1)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, i1 false, ptr @Three.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, ptr @Three.str)
; ByteAddressBuffer Four : register(t4)
%Four_h = call target("dx.RawBuffer", i8, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @Four.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @Four.str)
; StructuredBuffer<int16_t> Five : register(t6);
%Five_h = call target("dx.RawBuffer", i16, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, i1 false, ptr @Five.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, ptr @Five.str)
; Buffer<double> Six : register(t10, space2);
%Six_h = call target("dx.TypedBuffer", i64, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, i1 false, ptr @Six.str)
+ @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, ptr @Six.str)
; Same buffer type as Six - should have the same type in metadata
; Buffer<double> Seven : register(t20, space5);
%Seven_h = call target("dx.TypedBuffer", i64, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, i1 false, ptr @Seven.str)
+ @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, ptr @Seven.str)
; Buffer<float4> Array[100] : register(t4, space3);
; Buffer<float4> B1 = Array[30];
; Buffer<float4> B2 = Array[42];
; resource array accesses should produce one metadata entry
%Array_30_h = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, i1 false, ptr @Array.str)
+ @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, ptr @Array.str)
%Array_42_h = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, i1 false, ptr @Array.str)
+ @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, ptr @Array.str)
; test unbounded resource array
; Buffer<double> Array2[] : register(t2, space4);
; Buffer<double> C1 = Array[10];
; Buffer<double> C2 = Array[20];
%Array2_10_h = call target("dx.TypedBuffer", double, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, i1 false, ptr @Array2.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @Array2.str)
%Array2_20_h = call target("dx.TypedBuffer", double, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, i1 false, ptr @Array2.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, ptr @Array2.str)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll
index 4928b1d0bab97..5b2b3ef280626 100644
--- a/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll
+++ b/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll
@@ -40,66 +40,66 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @test() #0 {
; RWBuffer<half4> Zero : register(u0)
%Zero_h = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @Zero.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @Zero.str)
; RWBuffer<float4> One : register(u1)
%One_h = call target("dx.TypedBuffer", <2 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @One.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @One.str)
; RWBuffer<double> Two : register(u2);
%Two_h = call target("dx.TypedBuffer", double, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr @Two.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr @Two.str)
; RWBuffer<int4> Three : register(u3);
%Three_h = call target("dx.TypedBuffer", <4 x i32>, 1, 0, 1)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, i1 false, ptr @Three.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, ptr @Three.str)
; ByteAddressBuffer Four : register(u5)
%Four_h = call target("dx.RawBuffer", i8, 1, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @Four.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @Four.str)
; RWStructuredBuffer<int16_t> Five : register(u6);
%Five_h = call target("dx.RawBuffer", i16, 1, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, i1 false, ptr @Five.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, ptr @Five.str)
; RasterizerOrderedBuffer<int4> Six : register(u7);
%Six_h = call target("dx.TypedBuffer", <4 x i32>, 1, 1, 1)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 7, i32 1, i32 0, i1 false, ptr @Six.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 7, i32 1, i32 0, ptr @Six.str)
; RasterizerOrderedStructuredBuffer<uint4> Seven : register(u3, space10);
%Seven_h = call target("dx.RawBuffer", <4 x i32>, 1, 1)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 8, i32 1, i32 0, i1 false, ptr @Seven.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 8, i32 1, i32 0, ptr @Seven.str)
; RasterizerOrderedByteAddressBuffer Eight : register(u9);
%Eight_h = call target("dx.RawBuffer", i8, 1, 1)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, i1 false, ptr @Eight.str)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, ptr @Eight.str)
; RWBuffer<double> Nine : register(u2);
%Nine_h = call target("dx.TypedBuffer", i64, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, i1 false, ptr @Nine.str)
+ @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, ptr @Nine.str)
; RWBuffer<float4> Array[100] : register(u4, space3);
; RWBuffer<float4> B1 = Array[30];
; RWBuffer<float4> B2 = Array[42];
; resource array accesses should produce one metadata entry
%Array_30_h = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, i1 false, ptr @Array.str)
+ @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, ptr @Array.str)
%Array_42_h = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, i1 false, ptr @Array.str)
+ @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, ptr @Array.str)
; test unbounded resource array
; RWBuffer<double> Array2[] : register(u2, space4);
; RWBuffer<double> C1 = Array[10];
; RWBuffer<double> C2 = Array[20];
%Array2_10_h = call target("dx.TypedBuffer", double, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, i1 false, ptr @Array2.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @Array2.str)
%Array2_20_h = call target("dx.TypedBuffer", double, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, i1 false, ptr @Array2.str)
+ @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, ptr @Array2.str)
; Same buffer type as Nine - should have the same type in metadata
; RWBuffer<double> Ten : register(u2);
%Ten_h = call target("dx.TypedBuffer", i64, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 5, i32 22, i32 1, i32 0, i1 false, ptr @Ten.str)
+ @llvm.dx.resource.handlefrombinding(i32 5, i32 22, i32 1, i32 0, ptr @Ten.str)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoad.ll b/llvm/test/CodeGen/DirectX/RawBufferLoad.ll
index 869a5b1e3b964..37260326071bb 100644
--- a/llvm/test/CodeGen/DirectX/RawBufferLoad.ll
+++ b/llvm/test/CodeGen/DirectX/RawBufferLoad.ll
@@ -13,7 +13,7 @@ declare void @v4f64_user(<4 x double>)
define void @loadf32_struct(i32 %index) {
%buffer = call target("dx.RawBuffer", float, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 1, i32 4)
%load = call {float, i1}
@@ -34,7 +34,7 @@ define void @loadf32_struct(i32 %index) {
define void @loadf32_byte(i32 %offset) {
%buffer = call target("dx.RawBuffer", i8, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 1, i32 4)
%load = call {float, i1}
@@ -55,7 +55,7 @@ define void @loadf32_byte(i32 %offset) {
define void @loadv4f32_struct(i32 %index) {
%buffer = call target("dx.RawBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 15, i32 4)
%load = call {<4 x float>, i1}
@@ -83,7 +83,7 @@ define void @loadv4f32_struct(i32 %index) {
define void @loadv4f32_byte(i32 %offset) {
%buffer = call target("dx.RawBuffer", i8, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 15, i32 4)
%load = call {<4 x float>, i1}
@@ -111,7 +111,7 @@ define void @loadv4f32_byte(i32 %offset) {
define void @loadelements(i32 %index) {
%buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATAF32:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 15, i32 4)
%loadf32 = call {<4 x float>, i1}
@@ -158,7 +158,7 @@ define void @loadelements(i32 %index) {
define void @loadnested(i32 %index) {
%buffer = call
target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATAI32:%.*]] = call %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 1, i32 4)
%loadi32 = call {i32, i1} @llvm.dx.resource.load.rawbuffer.i32(
@@ -210,7 +210,7 @@ define void @loadnested(i32 %index) {
define void @loadv4f64_byte(i32 %offset) {
%buffer = call target("dx.RawBuffer", i8, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f64 @dx.op.rawBufferLoad.f64(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 15, i32 8)
%load = call {<4 x double>, i1} @llvm.dx.resource.load.rawbuffer.v4i64(
diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll b/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll
index 9213d60c9b496..6c7d8c2598330 100644
--- a/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll
+++ b/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll
@@ -5,10 +5,10 @@ define void @loadf64(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", double, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", double, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { double, i1 } @llvm.dx.resource.load.rawbuffer
@@ -38,10 +38,10 @@ define void @loadv2f64(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <2 x double>, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2f64_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", <2 x double>, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2f64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { <2 x double>, i1 } @llvm.dx.resource.load.rawbuffer
@@ -76,10 +76,10 @@ define void @loadf64WithCheckBit(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", double, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", double, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { double, i1 } @llvm.dx.resource.load.rawbuffer
@@ -116,10 +116,10 @@ define void @loadv3f64(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <3 x double>, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3f64_0_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", <3 x double>, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3f64_0_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { <3 x double>, i1 } @llvm.dx.resource.load.rawbuffer
@@ -172,10 +172,10 @@ define void @loadv4f64(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <4 x double>, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4f64_0_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", <4 x double>, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4f64_0_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { <4 x double>, i1 } @llvm.dx.resource.load.rawbuffer
diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll b/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll
index a1c153f2c0c84..310283f0ef38b 100644
--- a/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll
+++ b/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll
@@ -5,10 +5,10 @@ define void @loadi64(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", i64, 1, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", i64, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { i64, i1 } @llvm.dx.resource.load.rawbuffer
@@ -41,10 +41,10 @@ define void @loadv2i64(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <2 x i64>, 1, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2i64_1_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", <2 x i64>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2i64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { <2 x i64>, i1 } @llvm.dx.resource.load.rawbuffer
@@ -85,10 +85,10 @@ define void @loadi64WithCheckBit(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", i64, 1, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t(
- ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", i64, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { i64, i1 } @llvm.dx.resource.load.rawbuffer
@@ -128,10 +128,10 @@ define void @loadv3i64(i32 %index) {
; check the handle from binding is unchanged
; CHECK: [[Buf:%.*]] = call target("dx.Rawbuffer", <3 x i64>, 0, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3i64_0_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", <3 x i64>, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3i64_0_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { <3 x i64>, i1 } @llvm.dx.resource.load.rawbuffer
@@ -193,10 +193,10 @@ define void @loadv4i64(i32 %index) {
; check the handle from binding is unchanged
; CHECK62: [[Buf:%.*]] = call target("dx.Rawbuffer", <4 x i64>, 0, 0)
; CHECK62-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4i64_0_0t(
- ; CHECK62-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK62-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = call target("dx.Rawbuffer", <4 x i64>, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4i64_0_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: [[L0:%.*]] = call { <4 x i64>, i1 } @llvm.dx.resource.load.rawbuffer
diff --git a/llvm/test/CodeGen/DirectX/RawBufferStore.ll b/llvm/test/CodeGen/DirectX/RawBufferStore.ll
index 3d03418cf2138..856f9d1034227 100644
--- a/llvm/test/CodeGen/DirectX/RawBufferStore.ll
+++ b/llvm/test/CodeGen/DirectX/RawBufferStore.ll
@@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @storef32_struct(i32 %index, float %data) {
%buffer = call target("dx.RawBuffer", float, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %buffer_annot, i32 %index, i32 0, float %data, float undef, float undef, float undef, i8 1, i32 4)
call void @llvm.dx.resource.store.rawbuffer.f32(
@@ -20,7 +20,7 @@ define void @storef32_struct(i32 %index, float %data) {
define void @storef32_byte(i32 %offset, float %data) {
%buffer = call target("dx.RawBuffer", i8, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %buffer_annot, i32 %offset, i32 0, float %data, float undef, float undef, float undef, i8 1, i32 4)
call void @llvm.dx.resource.store.rawbuffer.f32(
@@ -34,7 +34,7 @@ define void @storef32_byte(i32 %offset, float %data) {
define void @storev4f32_struct(i32 %index, <4 x float> %data) {
%buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0
; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1
@@ -52,7 +52,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) {
define void @storev4f32_byte(i32 %offset, <4 x float> %data) {
%buffer = call target("dx.RawBuffer", i8, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0
; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1
@@ -70,7 +70,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) {
define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) {
%buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0_0:%.*]] = extractelement <4 x float> %data0, i32 0
; CHECK: [[DATA0_1:%.*]] = extractelement <4 x float> %data0, i32 1
@@ -97,7 +97,7 @@ define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) {
define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half> %data2) {
%buffer = call
target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: call void @dx.op.rawBufferStore.i32(i32 140, %dx.types.Handle %buffer_annot, i32 %index, i32 0, i32 %data0, i32 undef, i32 undef, i32 undef, i8 1, i32 4)
call void @llvm.dx.resource.store.rawbuffer.i32(
@@ -129,7 +129,7 @@ define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half>
define void @storev4f64_byte(i32 %offset, <4 x double> %data) {
%buffer = call target("dx.RawBuffer", i8, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK: [[DATA0:%.*]] = extractelement <4 x double> %data, i32 0
; CHECK: [[DATA1:%.*]] = extractelement <4 x double> %data, i32 1
diff --git a/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll b/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll
index ddcd761d812fa..30a8039820e28 100644
--- a/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll
+++ b/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll
@@ -4,10 +4,10 @@
define void @storef64(double %0, i32 %index) {
; CHECK: [[B:%.*]] = tail call target("dx.RawBuffer", double, 1, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f64_1_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.RawBuffer", double, 1, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f64_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: call void @llvm.dx.resource.store.rawbuffer
@@ -30,10 +30,10 @@ define void @storef64(double %0, i32 %index) {
define void @storev2f64(<2 x double> %0, i32 %index) {
; CHECK: [[B:%.*]] = tail call target("dx.RawBuffer", <2 x double>, 1, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2f64_1_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.RawBuffer", <2 x double>, 1, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2f64_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: call void @llvm.dx.resource.store.rawbuffer
@@ -55,10 +55,10 @@ define void @storev2f64(<2 x double> %0, i32 %index) {
define void @storev3f64(<3 x double> %0, i32 %index) {
; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <3 x double>, 1, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3f64_1_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.RawBuffer", <3 x double>, 1, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3f64_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: call void @llvm.dx.resource.store.rawbuffer
@@ -81,10 +81,10 @@ define void @storev3f64(<3 x double> %0, i32 %index) {
define void @storev4f64(<4 x double> %0, i32 %index) {
; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <4 x double>, 1, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f64_1_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.RawBuffer", <4 x double>, 1, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f64_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: call void @llvm.dx.resource.store.rawbuffer
diff --git a/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll b/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll
index 54ec4d2cd2fb7..559b9acc105bf 100644
--- a/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll
+++ b/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll
@@ -4,10 +4,10 @@
define void @storei64(i64 %0, i32 %index) {
; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", i64, 1, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i64_1_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.RawBuffer", i64, 1, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i64_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: call void @llvm.dx.resource.store.rawbuffer
@@ -30,10 +30,10 @@ define void @storei64(i64 %0, i32 %index) {
define void @storev2i64(<2 x i64> %0, i32 %index) {
; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <2 x i64>, 1, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2i64_1_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.RawBuffer", <2 x i64>, 1, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2i64_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: call void @llvm.dx.resource.store.rawbuffer
@@ -54,10 +54,10 @@ define void @storev2i64(<2 x i64> %0, i32 %index) {
define void @storev3i64(<3 x i64> %0, i32 %index) {
; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <3 x i64>, 1, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3i64_1_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.RawBuffer", <3 x i64>, 1, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3i64_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: call void @llvm.dx.resource.store.rawbuffer
@@ -80,10 +80,10 @@ define void @storev3i64(<3 x i64> %0, i32 %index) {
define void @storev4i64(<4 x i64> %0, i32 %index) {
; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <4 x i64>, 1, 0)
; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i64_1_0t(
- ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null)
%buffer = tail call target("dx.RawBuffer", <4 x i64>, 1, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i64_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; check we don't modify the code in sm6.3 or later
; CHECK63: call void @llvm.dx.resource.store.rawbuffer
; CHECK63-SAME: target("dx.RawBuffer", <4 x i64>, 1, 0) [[Buf]], i32 %index, i32 0, <4 x i64> %0)
diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
index 7ea9795f00b3c..ae5e992184f4c 100644
--- a/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
+++ b/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
@@ -13,7 +13,7 @@ declare void @v4f64_user(<4 x double>)
define void @loadf32_struct(i32 %index) {
%buffer = call target("dx.RawBuffer", float, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -32,7 +32,7 @@ define void @loadf32_struct(i32 %index) {
define void @loadf32_byte(i32 %offset) {
%buffer = call target("dx.RawBuffer", i8, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -51,7 +51,7 @@ define void @loadf32_byte(i32 %offset) {
define void @loadv4f32_struct(i32 %index) {
%buffer = call target("dx.RawBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -70,7 +70,7 @@ define void @loadv4f32_struct(i32 %index) {
define void @loadv4f32_byte(i32 %offset) {
%buffer = call target("dx.RawBuffer", i8, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -89,7 +89,7 @@ define void @loadv4f32_byte(i32 %offset) {
define void @loadelements(i32 %index) {
%buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -116,7 +116,7 @@ define void @loadelements(i32 %index) {
define void @loadnested(i32 %index) {
%buffer = call
target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -151,7 +151,7 @@ define void @loadnested(i32 %index) {
define void @loadv4f64_byte(i32 %offset) {
%buffer = call target("dx.RawBuffer", i8, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
index 2a557c73205cb..d2e5584e42650 100644
--- a/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
+++ b/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
@@ -10,7 +10,7 @@ declare void @use_float1(<1 x float>)
define void @load_float4(i32 %index, i32 %elemindex) {
%buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -40,7 +40,7 @@ define void @load_float4(i32 %index, i32 %elemindex) {
; CHECK-LABEL: define void @load_float(
define void @load_float(i32 %index) {
%buffer = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -65,7 +65,7 @@ define void @load_float(i32 %index) {
; CHECK-LABEL: define void @load_float1(
define void @load_float1(i32 %index) {
%buffer = call target("dx.TypedBuffer", <1 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
index ed41d8ba24246..2ddf615be4a67 100644
--- a/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
+++ b/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
@@ -5,7 +5,7 @@ target triple = "dxil-pc-shadermodel6.6-compute"
; CHECK-LABEL: define void @storef32_struct
define void @storef32_struct(i32 %index, float %data) {
%buffer = call target("dx.RawBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -20,7 +20,7 @@ define void @storef32_struct(i32 %index, float %data) {
; CHECK-LABEL: define void @storef32_byte
define void @storef32_byte(i32 %offset, float %data) {
%buffer = call target("dx.RawBuffer", i8, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -35,7 +35,7 @@ define void @storef32_byte(i32 %offset, float %data) {
; CHECK-LABEL: define void @storev4f32_struct
define void @storev4f32_struct(i32 %index, <4 x float> %data) {
%buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -50,7 +50,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) {
; CHECK-LABEL: define void @storev4f32_byte
define void @storev4f32_byte(i32 %offset, <4 x float> %data) {
%buffer = call target("dx.RawBuffer", i8, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -65,7 +65,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) {
; CHECK-LABEL: define void @storeelements
define void @storeelements(i32 %index, <4 x float> %dataf32, <4 x i32> %datai32) {
%buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -86,7 +86,7 @@ define void @storeelements(i32 %index, <4 x float> %dataf32, <4 x i32> %datai32)
define void @storenested(i32 %index, i32 %datai32, <4 x float> %dataf32, <3 x half> %dataf16) {
%buffer = call
target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -111,7 +111,7 @@ define void @storenested(i32 %index, i32 %datai32, <4 x float> %dataf32, <3 x ha
; CHECK-LABEL: define void @storev4f64_byte
define void @storev4f64_byte(i32 %offset, <4 x double> %data) {
%buffer = call target("dx.RawBuffer", i8, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
index 54aa25477ea8e..f27fa65957e6a 100644
--- a/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
+++ b/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
@@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute"
define void @store_float4(<4 x float> %data, i32 %index, i32 %elemindex) {
%buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -47,7 +47,7 @@ define void @store_float4(<4 x float> %data, i32 %index, i32 %elemindex) {
define void @store_half4(<4 x half> %data, i32 %index) {
%buffer = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
@@ -80,7 +80,7 @@ define void @store_half4(<4 x half> %data, i32 %index) {
define void @store_double2(<2 x double> %data, i32 %index) {
%buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NOT: @llvm.dx.resource.getpointer
%ptr = call ptr @llvm.dx.resource.getpointer(
diff --git a/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll b/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
index 8bec56e2a2fa9..34eb5554e90ef 100644
--- a/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
+++ b/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
@@ -21,9 +21,9 @@ define void @main() local_unnamed_addr #0 {
entry:
; DXOP: [[In_h_i:%.*]] = call %dx.types.Handle @dx.op.createHandle
; DXOP: [[Out_h_i:%.*]] = call %dx.types.Handle @dx.op.createHandle
- %In_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %In_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %In_h.i, ptr @In, align 4
- %Out_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 4, i32 1, i32 1, i32 0, i1 false, ptr null)
+ %Out_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 4, i32 1, i32 1, i32 0, ptr null)
store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %Out_h.i, ptr @Out, align 4
; CSE: call i32 @llvm.dx.flattened.thread.id.in.group()
%0 = call i32 @llvm.dx.flattened.thread.id.in.group()
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
index dd5f098acf2d0..e83ea60a74422 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
@@ -18,12 +18,12 @@ define void @test() "hlsl.export" {
; RWBuffer<float> Buf : register(u0, space0)
%buf0 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf[8] : register(u1, space0)
%buf1 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 1, i32 8, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 8, i32 0, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
index 6e965d9d92ac1..a397074650e46 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
@@ -19,12 +19,12 @@ define void @test() "hlsl.export" {
; RWBuffer<float> Buf : register(u0, space0)
%buf0 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf[8] : register(u1, space0)
%buf1 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 1, i32 8, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 8, i32 0, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
index 0f8674d8f17eb..6ed267d05dae1 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
@@ -18,39 +18,39 @@ define void @test() "hlsl.export" {
; RWBuffer<float> Buf : register(u0, space0)
%buf0 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf : register(u1, space0)
%buf1 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 1, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf : register(u2, space0)
%buf2 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 2, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 2, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf : register(u3, space0)
%buf3 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 3, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 3, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf : register(u4, space0)
%buf4 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 4, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 4, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf : register(u5, space0)
%buf5 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 5, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 5, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf : register(u6, space0)
%buf6 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 6, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 6, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf : register(u7, space0)
%buf7 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 7, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 7, i32 1, i32 0, ptr null)
; RWBuffer<float> Buf : register(u8, space0)
%buf8 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 8, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 8, i32 1, i32 0, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll
index 9680193e90cdc..e3bd584c4428d 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll
@@ -14,7 +14,7 @@ target triple = "dxil-pc-shadermodel6.7-library"
; CHECK: Function rawbuf : 0x00000010
define float @rawbuf() "hlsl.export" {
%buffer = call target("dx.RawBuffer", i8, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.rawbuffer.f32(
target("dx.RawBuffer", i8, 0, 0, 0) %buffer, i32 0, i32 0)
%data = extractvalue {float, i1} %load, 0
@@ -24,7 +24,7 @@ define float @rawbuf() "hlsl.export" {
; CHECK: Function structbuf : 0x00000010
define float @structbuf() "hlsl.export" {
%buffer = call target("dx.RawBuffer", float, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.rawbuffer.f32(
target("dx.RawBuffer", float, 0, 0, 0) %buffer, i32 0, i32 0)
%data = extractvalue {float, i1} %load, 0
@@ -34,7 +34,7 @@ define float @structbuf() "hlsl.export" {
; CHECK: Function typedbuf : 0x00000000
define float @typedbuf(<4 x float> %val) "hlsl.export" {
%buffer = call target("dx.TypedBuffer", float, 0, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.typedbuffer(
target("dx.TypedBuffer", float, 0, 0, 0) %buffer, i32 0)
%data = extractvalue {float, i1} %load, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll
index 5e44b93de8466..9d570fea164dd 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll
@@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library"
; CHECK: Function rawbuf : 0x00000014
define void @rawbuf() "hlsl.export" {
%rb = tail call target("dx.RawBuffer", <4 x double>, 0, 0)
- @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call { <4 x double>, i1 }
@llvm.dx.resource.load.rawbuffer.v4double.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x double>, 0, 0) %rb, i32 0, i32 0)
%extract = extractvalue { <4 x double>, i1 } %load, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll
index 517147aa14d57..48ce42cc4b8ba 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll
@@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library"
; CHECK: Function rawbuf : 0x00100010
define void @rawbuf() "hlsl.export" {
%rb = tail call target("dx.RawBuffer", <4 x i64>, 0, 0)
- @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call { <4 x i64>, i1 }
@llvm.dx.resource.load.rawbuffer.v4i64.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x i64>, 0, 0) %rb, i32 0, i32 0)
%extract = extractvalue { <4 x i64>, i1 } %load, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll
index cb4a3e9a9a59f..5e5cf0cfddc69 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll
@@ -18,9 +18,9 @@ target triple = "dxil-pc-shadermodel6.7-library"
; CHECK: Function rawbuf : 0x00800030
define void @rawbuf() "hlsl.export" {
%halfrb = tail call target("dx.RawBuffer", <4 x half>, 0, 0)
- @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null)
%i16rb = tail call target("dx.RawBuffer", <4 x i16>, 1, 0)
- @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i16_1_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i16_1_0t(i32 0, i32 1, i32 1, i32 0, ptr null)
%loadhalfrb = call { <4 x i16>, i1 }
@llvm.dx.resource.load.rawbuffer.v4i16.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x half>, 0, 0) %halfrb, i32 0, i32 0)
%extracti16vec = extractvalue { <4 x i16>, i1 } %loadhalfrb, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
index 1bac7ead04b40..4d30fa7c56bc9 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
@@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.8-library"
; CHECK: Function loadUAV : 0x20000000
define float @loadUAV() #0 {
%res = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.typedbuffer(
target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0)
%val = extractvalue {float, i1} %load, 0
@@ -27,7 +27,7 @@ define float @loadUAV() #0 {
; CHECK: Function loadSRV : 0x00000010
define float @loadSRV() #0 {
%res = tail call target("dx.RawBuffer", float, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.rawbuffer(
target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0)
%val = extractvalue { float, i1 } %load, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
index 115585de5ee02..9351401449042 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
@@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.8-library"
; CHECK: Function loadUAV : 0x00000000
define float @loadUAV() #0 {
%res = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.typedbuffer(
target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0)
%val = extractvalue {float, i1} %load, 0
@@ -27,7 +27,7 @@ define float @loadUAV() #0 {
; CHECK: Function loadSRV : 0x00000010
define float @loadSRV() #0 {
%res = tail call target("dx.RawBuffer", float, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.rawbuffer(
target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0)
%val = extractvalue { float, i1 } %load, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll
index 97494aefffbcf..ba03d39be2121 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll
@@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.6-library"
; CHECK: Function loadUAV : 0x00000000
define float @loadUAV() #0 {
%res = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.typedbuffer(
target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0)
%val = extractvalue {float, i1} %load, 0
@@ -27,7 +27,7 @@ define float @loadUAV() #0 {
; CHECK: Function loadSRV : 0x00000010
define float @loadSRV() #0 {
%res = tail call target("dx.RawBuffer", float, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.rawbuffer(
target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0)
%val = extractvalue { float, i1 } %load, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
index 1a5cba4084fb1..d91d6fe33a22b 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
@@ -22,7 +22,7 @@ target triple = "dxil-pc-shadermodel6.7-library"
; CHECK: Function loadUAV : 0x200010000
define float @loadUAV() #0 {
%res = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.typedbuffer(
target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0)
%val = extractvalue {float, i1} %load, 0
@@ -32,7 +32,7 @@ define float @loadUAV() #0 {
; CHECK: Function loadSRV : 0x200010010
define float @loadSRV() #0 {
%res = tail call target("dx.RawBuffer", float, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.rawbuffer(
target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0)
%val = extractvalue { float, i1 } %load, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll
index 242faa26c82f1..08a9d94ae4957 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll
@@ -18,7 +18,7 @@ target triple = "dxil-pc-shadermodel6.7-library"
; CHECK: Function loadUAV : 0x20000000
define float @loadUAV() #0 {
%res = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.typedbuffer(
target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0)
%val = extractvalue {float, i1} %load, 0
@@ -28,7 +28,7 @@ define float @loadUAV() #0 {
; CHECK: Function loadSRV : 0x00000010
define float @loadSRV() #0 {
%res = tail call target("dx.RawBuffer", float, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.rawbuffer(
target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0)
%val = extractvalue { float, i1 } %load, 0
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
index b0a5d5de77c29..87172338db656 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
@@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library"
; CHECK: Function multicomponent : 0x00002000
define <4 x float> @multicomponent() #0 {
%res = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null)
%load = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer(
target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %res, i32 0)
%val = extractvalue {<4 x float>, i1} %load, 0
@@ -26,7 +26,7 @@ define <4 x float> @multicomponent() #0 {
; CHECK: Function onecomponent : 0x00000000
define float @onecomponent() #0 {
%res = call target("dx.TypedBuffer", float, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null)
%load = call {float, i1} @llvm.dx.resource.load.typedbuffer(
target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0)
%val = extractvalue {float, i1} %load, 0
@@ -36,7 +36,7 @@ define float @onecomponent() #0 {
; CHECK: Function noload : 0x00000000
define void @noload(<4 x float> %val) #0 {
%res = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
- @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null)
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null)
call void @llvm.dx.resource.store.typedbuffer(
target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %res, i32 0,
<4 x float> %val)
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
index dc9d2cf776291..ae2b35f80bde5 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
@@ -17,7 +17,7 @@ define void @test() "hlsl.export" {
; RWBuffer<float> Buf : register(u0, space0)
%buf0 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll
index 2248b9f6d4e99..a7e8e7fa3556a 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll
@@ -16,7 +16,7 @@ define void @test() "hlsl.export" {
; RWBuffer<float> Buf : register(u0, space0)
%buf0 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
index 60ecc8fe3d1f3..da47bb1d0ed53 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
@@ -18,7 +18,7 @@ define void @VSMain() {
; RWBuffer<float> Buf : register(u0, space0)
%buf0 = call target("dx.TypedBuffer", float, 1, 0, 1)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll b/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
index c73a31dcc1139..bd0582c4b90bb 100644
--- a/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
+++ b/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
@@ -8,7 +8,7 @@ define void @update_counter_decrement_vector() {
; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217,
%buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 -1){{$}}
@@ -21,7 +21,7 @@ define void @update_counter_increment_vector() {
; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217,
%buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0(
- i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ i32 0, i32 0, i32 1, i32 0, ptr null)
; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 1){{$}}
%1 = call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 0, 0, 0) %buffer, i8 1)
@@ -33,7 +33,7 @@ define void @update_counter_decrement_scalar() {
; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217,
%buffer = call target("dx.RawBuffer", i8, 0, 0)
@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t(
- i32 1, i32 8, i32 1, i32 0, i1 false, ptr null)
+ i32 1, i32 8, i32 1, i32 0, ptr null)
; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]]
; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 -1){{$}}
%1 = call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", i8, 0, 0) %buffer, i8 -1)
diff --git a/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll b/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll
index ce5c2d7ca32bf..4f2871341ff8c 100644
--- a/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll
+++ b/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll
@@ -14,7 +14,7 @@ define void @CSMain() local_unnamed_addr {
; CHECK-LABEL: define void @CSMain() local_unnamed_addr {
; CHECK-NEXT: [[ENTRY:.*:]]
; FHCHECK-NEXT: [[AGG_TMP_I1_SROA_0:%.*]] = alloca target("dx.RawBuffer", i32, 1, 0), align 8
-; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, i1 false, ptr nonnull @name)
+; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, ptr nonnull @name)
; CHECK-NEXT: store target("dx.RawBuffer", i32, 1, 0) [[TMP0]], ptr @global, align 4
; FHCHECK-NEXT: [[TMP2:%.*]] = load i32, ptr @global, align 4
; FHCHECK-NEXT: store i32 [[TMP2]], ptr [[AGG_TMP_I1_SROA_0]], align 8
@@ -24,7 +24,7 @@ define void @CSMain() local_unnamed_addr {
;
entry:
%alloca = alloca target("dx.RawBuffer", i32, 1, 0), align 8
- %handle = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, i1 false, ptr nonnull @name)
+ %handle = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, ptr nonnull @name)
store target("dx.RawBuffer", i32, 1, 0) %handle , ptr @global, align 4
%val = load i32, ptr @global, align 4
call void @llvm.lifetime.start.p0(ptr nonnull %alloca)
diff --git a/llvm/test/CodeGen/DirectX/resource_counter_error.ll b/llvm/test/CodeGen/DirectX/resource_counter_error.ll
index f3dae481af247..cb5fdef1cf6f1 100644
--- a/llvm/test/CodeGen/DirectX/resource_counter_error.ll
+++ b/llvm/test/CodeGen/DirectX/resource_counter_error.ll
@@ -3,7 +3,7 @@
define void @inc_and_dec() {
entry:
- %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, i1 false, ptr null)
+ %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, ptr null)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 -1)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 1)
ret void
diff --git a/llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll b/llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
index aab0ae05753fa..55f049232b147 100644
--- a/llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
+++ b/llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
@@ -8,7 +8,7 @@
define void @main() #0 {
entry:
- %0 = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_1t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %0 = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_1t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.b0)
%1 = tail call noundef align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i32_12_1t(target("spirv.VulkanBuffer", [0 x i32], 12, 1) %0, i32 0)
store i32 1, ptr addrspace(11) %1, align 4
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
index b14b6af156caf..881ca506449b7 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
@@ -22,7 +22,7 @@ define void @RWBufferLoad_Vec4_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: OpImageRead [[v4_int]] [[buffer]] [[zero]]
%data0 = call <4 x i32> @llvm.spv.resource.load.typedbuffer(
@@ -37,7 +37,7 @@ define void @RWBufferLoad_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[V:%[0-9]+]] = OpImageRead [[v4_int]] [[buffer]] [[zero]]
; CHECK: OpCompositeExtract [[int]] [[V]] 0
@@ -53,7 +53,7 @@ define void @RWBufferLoad_Vec2_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[V:%[0-9]+]] = OpImageRead [[v4_int]] [[buffer]] [[zero]]
; CHECK: [[e0:%[0-9]+]] = OpCompositeExtract [[int]] [[V]] 0
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
index 22fb4c3e78dcc..0c688f7e6d7c4 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
@@ -20,7 +20,7 @@
define void @main_scalar() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
; CHECK: [[V:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0
@@ -59,7 +59,7 @@ bb_both:
define void @main_vector2() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
; CHECK: [[E0:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0
@@ -102,7 +102,7 @@ bb_both:
define void @main_vector4() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1) %s_h.i, i32 1)
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
index ee976f1a4110e..87cd2c98d2e8b 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
@@ -24,7 +24,7 @@ declare <4 x i32> @get_data() #1
define void @RWBufferStore_Vec4_I32() #0 {
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.b)
; CHECK: [[data:%[0-9]+]] = OpFunctionCall
%data = call <4 x i32> @get_data()
@@ -37,4 +37,4 @@ define void @RWBufferStore_Vec4_I32() #0 {
}
attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
-attributes #1 = { convergent noinline norecurse "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
\ No newline at end of file
+attributes #1 = { convergent noinline norecurse "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
index 00e9185822ad5..cd524980ed275 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
@@ -38,14 +38,14 @@
define void @main() local_unnamed_addr #0 {
entry:
- %0 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefromimplicitbinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str)
- %1 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.2)
- %2 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefromimplicitbinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 1, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.4)
- %3 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr nonnull @.str.6)
- %4 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 10, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.8)
- %5 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefromimplicitbinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 2, i32 10, i32 1, i32 0, i1 false, ptr nonnull @.str.10)
- %6 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefromimplicitbinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 10, i32 1, i32 0, i1 false, ptr nonnull @.str.12)
- %7 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 10, i32 2, i32 1, i32 0, i1 false, ptr nonnull @.str.14)
+ %0 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefromimplicitbinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str)
+ %1 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str.2)
+ %2 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefromimplicitbinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str.4)
+ %3 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 0, i32 2, i32 1, i32 0, ptr nonnull @.str.6)
+ %4 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 10, i32 1, i32 1, i32 0, ptr nonnull @.str.8)
+ %5 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefromimplicitbinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 2, i32 10, i32 1, i32 0, ptr nonnull @.str.10)
+ %6 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefromimplicitbinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 10, i32 1, i32 0, ptr nonnull @.str.12)
+ %7 = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 10, i32 2, i32 1, i32 0, ptr nonnull @.str.14)
%8 = tail call noundef align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.SignedImage_i32_5_2_0_0_2_0t(target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) %1, i32 0)
%9 = load i32, ptr addrspace(11) %8, align 4
%10 = tail call noundef align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.SignedImage_i32_5_2_0_0_2_0t(target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) %2, i32 0)
@@ -72,4 +72,4 @@ entry:
}
-attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
\ No newline at end of file
+attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/MixedBufferLoadStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/MixedBufferLoadStore.ll
index 66fda60b5ac4e..ee8be52c328de 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/MixedBufferLoadStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/MixedBufferLoadStore.ll
@@ -7,7 +7,7 @@
; CHECK: {{.*}} OpFunction {{.*}}
define void @main_unsigned() local_unnamed_addr #0 {
entry:
- %s_h.i = tail call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.unsigned)
+ %s_h.i = tail call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.unsigned)
; CHECK: {{%[0-9]+}} = OpImageRead {{%[0-9]+}} {{%[0-9]+}} {{%[0-9]+}}
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_i32_5_2_0_0_2_0t(target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) %s_h.i, i32 1)
@@ -21,7 +21,7 @@ entry:
; CHECK: {{.*}} OpFunction {{.*}}
define void @main_signed() local_unnamed_addr #0 {
entry:
- %s_h.i = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.signed)
+ %s_h.i = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.signed)
; CHECK: {{%[0-9]+}} = OpImageRead {{%[0-9]+}} {{%[0-9]+}} {{%[0-9]+}} SignExtend
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.SignedImage_i32_5_2_0_0_2_0t(target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) %s_h.i, i32 1)
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
index 5e9d88fd9af0e..15a1a3291fcb1 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
@@ -26,7 +26,7 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
define external i32 @unpacked_vulkan_buffer_load() {
entry:
- %handle = tail call target("spirv.VulkanBuffer", [0 x %unpacked], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.unpacked)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %unpacked], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str.unpacked)
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x %unpacked], 12, 0) %handle, i32 1)
%1 = load i32, ptr addrspace(11) %0, align 4
ret i32 %1
@@ -34,7 +34,7 @@ entry:
define external i32 @packed_vulkan_buffer_load() {
entry:
- %handle = tail call target("spirv.VulkanBuffer", [0 x %packed], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.packed)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %packed], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.packed)
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x %packed], 12, 0) %handle, i32 1)
%1 = load i32, ptr addrspace(11) %0, align 4
ret i32 %1
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
index 03b41ae0df31f..d3046b5e2477b 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
@@ -24,7 +24,7 @@ define void @RWBufferLoad() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.int_buf)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.int_buf)
%ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) %buffer0, i32 0)
store i32 0, ptr %ptr0, align 4
@@ -32,7 +32,7 @@ define void @RWBufferLoad() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.int_buf)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.int_buf)
%ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) %buffer1, i32 0)
store i32 0, ptr %ptr1, align 4
ret void
@@ -46,7 +46,7 @@ define void @UseDifferentGlobalVar() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeFloat]] [[FloatBufferVar]]
%buffer0 = call target("spirv.Image", float, 5, 2, 0, 0, 2, 3)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_3(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.float_buf )
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.float_buf )
%ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 3) %buffer0, i32 0)
store float 0.0, ptr %ptr0, align 4
ret void
@@ -60,7 +60,7 @@ define void @ReuseGlobalVarFromFirstFunction() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.int_buf)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.int_buf)
%ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) %buffer1, i32 0)
store i32 0, ptr %ptr1, align 4
ret void
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
index 354796ce9c1eb..d15f88b5dd799 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
@@ -19,7 +19,7 @@
define void @main_scalar() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4int]] [[H]] [[one]] SignExtend
; CHECK: [[V:%[0-9]+]] = OpCompositeExtract [[uint]] [[R]] 0
@@ -58,7 +58,7 @@ bb_both:
define void @main_vector2() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4int]] [[H]] [[one]] SignExtend
; CHECK: [[E0:%[0-9]+]] = OpCompositeExtract [[uint]] [[R]] 0
@@ -101,7 +101,7 @@ bb_both:
define void @main_vector4() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.SignedImage_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4int]] [[H]] [[one]] SignExtend
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.SignedImage_i32_5_2_0_0_2_0t(target("spirv.SignedImage", i32, 5, 2, 0, 0, 2, 0) %s_h.i, i32 1)
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
index 236c5e4ea56a5..d00209778e94e 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
@@ -28,7 +28,7 @@ define void @main() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]]
%buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24(
- i32 3, i32 4, i32 3, i32 0, i1 false, ptr nonnull @.str.b0)
+ i32 3, i32 4, i32 3, i32 0, ptr nonnull @.str.b0)
%ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) %buffer0, i32 0)
store i32 0, ptr %ptr0, align 4
@@ -36,7 +36,7 @@ define void @main() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]]
%buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24(
- i32 3, i32 4, i32 3, i32 1, i1 false, ptr nonnull @.str.b0)
+ i32 3, i32 4, i32 3, i32 1, ptr nonnull @.str.b0)
%ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) %buffer1, i32 0)
store i32 0, ptr %ptr1, align 4
ret void
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
index 5693f797c798e..08b2756fbab00 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
@@ -1,6 +1,10 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %}
+; This test depends on NonUniform resource analysis
+; https://github.com/llvm/llvm-project/issues/155701
+; XFAIL: *
+
@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
; CHECK-DAG: OpCapability Shader
@@ -35,7 +39,7 @@ define void @main() #0 {
; CHECK: [[ld0]] = OpLoad [[BufferType]] [[ac0]]
%buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24(
- i32 3, i32 4, i32 3, i32 0, i1 true, ptr nonnull @.str.b0)
+ i32 3, i32 4, i32 3, i32 0, ptr nonnull @.str.b0)
%ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) %buffer0, i32 0)
store i32 0, ptr %ptr0, align 4
@@ -43,7 +47,7 @@ define void @main() #0 {
; CHECK: [[ld1]] = OpLoad [[BufferType]] [[ac1]]
%buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24(
- i32 3, i32 4, i32 3, i32 1, i1 true, ptr nonnull @.str.b0)
+ i32 3, i32 4, i32 3, i32 1, ptr nonnull @.str.b0)
%ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) %buffer1, i32 0)
store i32 0, ptr %ptr1, align 4
ret void
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
index e47685cd38a2a..ef2185af396c3 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
@@ -37,9 +37,9 @@ entry:
; CHECK-DAG: [[BufferHandle:%.+]] = OpCopyObject [[BufferPtrType]] [[BufferVar]]
; CHECK-DAG: [[BufferHandle2:%.+]] = OpCopyObject [[BufferPtrType]] [[BufferVar]]
; CHECK-DAG: [[RWBufferHandle:%.+]] = OpCopyObject [[RWBufferPtrType]] [[RWBufferVar]]
- %BufferHandle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
- %BufferHandle2 = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
- %RWBufferHandle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_1t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.rwb)
+ %BufferHandle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str.b)
+ %BufferHandle2 = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str.b)
+ %RWBufferHandle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_1t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.rwb)
; CHECK: [[AC:%.+]] = OpAccessChain {{.*}} [[BufferHandle]] [[zero]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i32_12_0t(target("spirv.VulkanBuffer", [0 x i32], 12, 0) %BufferHandle, i32 1)
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
index 704665d7e52ea..4b5028925e029 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
@@ -21,7 +21,7 @@ define void @RWBufferLoad_Vec4_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str)
; CHECK: OpImageRead [[v4_int]] [[buffer]] [[zero]]
%data0 = call <4 x i32> @llvm.spv.resource.load.typedbuffer(
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
index 27ae6a03797c3..171fa71aab9a5 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
@@ -22,7 +22,7 @@ declare <4 x i32> @get_data() #1
define void @RWBufferLoad_Vec4_I32() #0 {
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0(
- i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
+ i32 16, i32 7, i32 1, i32 0, ptr nonnull @.str.b)
; CHECK: [[data:%[0-9]+]] = OpFunctionCall
%data = call <4 x i32> @get_data()
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
index e22724f02fa75..d038c5ce2574d 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
@@ -19,7 +19,7 @@
define void @main_scalar() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4int]] [[H]] [[one]]
; CHECK: [[V:%[0-9]+]] = OpCompositeExtract [[uint]] [[R]] 0
@@ -58,7 +58,7 @@ bb_both:
define void @main_vector2() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4int]] [[H]] [[one]]
; CHECK: [[E0:%[0-9]+]] = OpCompositeExtract [[uint]] [[R]] 0
@@ -101,7 +101,7 @@ bb_both:
define void @main_vector4() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %s_h.i = tail call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4int]] [[H]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_i32_5_2_0_0_2_0t(target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) %s_h.i, i32 1)
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll
index b2333e642340c..ed67344842b11 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll
@@ -17,8 +17,8 @@ define void @case1() local_unnamed_addr {
; CHECK: %[[#BUFFER_LOAD:]] = OpLoad %[[#FLOAT4]] %{{[0-9]+}} Aligned 16
; CHECK: %[[#CAST_LOAD:]] = OpBitcast %[[#INT4]] %[[#BUFFER_LOAD]]
; CHECK: %[[#VEC_SHUFFLE:]] = OpVectorShuffle %[[#INT4]] %[[#CAST_LOAD]] %[[#CAST_LOAD]] 0 1 2 3
- %1 = tail call target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4f32_12_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr nonnull @.str)
- %2 = tail call target("spirv.VulkanBuffer", [0 x <4 x i32>], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4i32_12_1t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.2)
+ %1 = tail call target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4f32_12_0t(i32 0, i32 2, i32 1, i32 0, ptr nonnull @.str)
+ %2 = tail call target("spirv.VulkanBuffer", [0 x <4 x i32>], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4i32_12_1t(i32 0, i32 5, i32 1, i32 0, ptr nonnull @.str.2)
%3 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v4f32_12_0t(target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) %1, i32 0)
%4 = load <4 x i32>, ptr addrspace(11) %3, align 16
%5 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v4i32_12_1t(target("spirv.VulkanBuffer", [0 x <4 x i32>], 12, 1) %2, i32 0)
@@ -31,8 +31,8 @@ define void @case2() local_unnamed_addr {
; CHECK: %[[#CAST_LOAD:]] = OpBitcast %[[#INT4]] %[[#BUFFER_LOAD]]
; CHECK: %[[#VEC_SHUFFLE:]] = OpVectorShuffle %[[#INT4]] %[[#CAST_LOAD]] %[[#CAST_LOAD]] 0 1 2 3
; CHECK: %[[#VEC_TRUNCATE:]] = OpVectorShuffle %[[#INT3]] %[[#VEC_SHUFFLE]] %[[#UNDEF_INT4]] 0 1 2
- %1 = tail call target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4f32_12_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr nonnull @.str)
- %2 = tail call target("spirv.VulkanBuffer", [0 x <3 x i32>], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v3i32_12_1t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.3)
+ %1 = tail call target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4f32_12_0t(i32 0, i32 2, i32 1, i32 0, ptr nonnull @.str)
+ %2 = tail call target("spirv.VulkanBuffer", [0 x <3 x i32>], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v3i32_12_1t(i32 0, i32 5, i32 1, i32 0, ptr nonnull @.str.3)
%3 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v4f32_12_0t(target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) %1, i32 0)
%4 = load <4 x i32>, ptr addrspace(11) %3, align 16
%5 = shufflevector <4 x i32> %4, <4 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2>
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
index 064251a57dfc6..f6677c9c2b1d9 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
@@ -39,11 +39,11 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
define void @main() local_unnamed_addr #1 {
entry:
- %standard_handle = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %standard_layout, 8, 0, 4), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
- %standard_handle_with_
diff erent_offset = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %standard_layout, 12, 0, 8), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b1)
- %backwards_handle = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %backwards_layout, 8, 4, 0), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b2)
- %large_gap_handle = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %large_gap, 1024, 0, 64, 1020, 4), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b3)
- %mixed_handle = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %mixed_layout, 16, 0, 8, 4, 12), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b4)
+ %standard_handle = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %standard_layout, 8, 0, 4), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.b0)
+ %standard_handle_with_
diff erent_offset = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %standard_layout, 12, 0, 8), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.b1)
+ %backwards_handle = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %backwards_layout, 8, 4, 0), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.b2)
+ %large_gap_handle = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %large_gap, 1024, 0, 64, 1020, 4), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.b3)
+ %mixed_handle = tail call target("spirv.VulkanBuffer", target("spirv.Layout", %mixed_layout, 16, 0, 8, 4, 12), 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str.b4)
ret void
}
diff --git a/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll b/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
index d87c175c36916..130fde2c6eb1a 100644
--- a/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
+++ b/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
@@ -25,7 +25,7 @@
define void @main() "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" {
entry:
- %handle = tail call target("spirv.VulkanBuffer", [0 x %S2], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_Ss_12_1t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %S2], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_Ss_12_1t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str)
; CHECK: %[[#resource:]] = OpVariable %[[#spirv_VulkanBuffer]] StorageBuffer
%ptr = tail call noundef align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_Ss_12_1t(target("spirv.VulkanBuffer", [0 x %S2], 12, 1) %handle, i32 0)
diff --git a/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll b/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
index 5a469a4515b79..5998b5de0ff6c 100644
--- a/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
+++ b/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
@@ -17,7 +17,7 @@
define void @main() "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" {
entry:
- %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.Ss_12_1t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.Ss_12_1t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str)
; CHECK: %[[#resource:]] = OpVariable %[[#spirv_VulkanBuffer]] StorageBuffer
%ptr = tail call noundef align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_struct.Ss_12_1t(target("spirv.VulkanBuffer", [0 x %struct.S], 12, 1) %handle, i32 0)
diff --git a/llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll b/llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
index edd2cc46c2a69..7548f4757dbe6 100644
--- a/llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
+++ b/llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
@@ -5,21 +5,21 @@
@.str = private unnamed_addr constant [7 x i8] c"buffer\00", align 1
define void @main() "hlsl.shader"="pixel" {
-; CHECK: %25 = OpFunction %2 None %3 ; -- Begin function main
+; CHECK: %24 = OpFunction %2 None %3 ; -- Begin function main
; CHECK-NEXT: %1 = OpLabel
-; CHECK-NEXT: %26 = OpVariable %14 Function %23
-; CHECK-NEXT: %27 = OpLoad %7 %24
-; CHECK-NEXT: %28 = OpImageRead %5 %27 %16
-; CHECK-NEXT: %29 = OpCompositeExtract %4 %28 0
-; CHECK-NEXT: %30 = OpCompositeExtract %4 %28 1
-; CHECK-NEXT: %31 = OpFAdd %4 %30 %29
-; CHECK-NEXT: %32 = OpCompositeInsert %5 %31 %28 0
-; CHECK-NEXT: %33 = OpLoad %7 %24
-; CHECK-NEXT: OpImageWrite %33 %16 %32
+; CHECK-NEXT: %25 = OpVariable %13 Function %22
+; CHECK-NEXT: %26 = OpLoad %7 %23
+; CHECK-NEXT: %27 = OpImageRead %5 %26 %15
+; CHECK-NEXT: %28 = OpCompositeExtract %4 %27 0
+; CHECK-NEXT: %29 = OpCompositeExtract %4 %27 1
+; CHECK-NEXT: %30 = OpFAdd %4 %29 %28
+; CHECK-NEXT: %31 = OpCompositeInsert %5 %30 %27 0
+; CHECK-NEXT: %32 = OpLoad %7 %23
+; CHECK-NEXT: OpImageWrite %32 %15 %31
; CHECK-NEXT: OpReturn
; CHECK-NEXT: OpFunctionEnd
entry:
- %0 = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str)
+ %0 = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str)
%1 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 0) %0, i32 0)
%2 = load <4 x float>, ptr addrspace(11) %1, align 16
%3 = extractelement <4 x float> %2, i64 0
@@ -31,7 +31,7 @@ entry:
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
-declare target("spirv.Image", float, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32, i32, i32, i32, i1, ptr) #0
+declare target("spirv.Image", float, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32, i32, i32, i32, ptr) #0
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
declare ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 0), i32) #0
diff --git a/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-1.ll b/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-1.ll
index 26dc60e738927..fce0f9798a75e 100644
--- a/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-1.ll
+++ b/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-1.ll
@@ -8,7 +8,7 @@
define <4 x float> @main() {
entry:
- %0 = tail call target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str)
+ %0 = tail call target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str)
%3 = tail call noundef align 1 dereferenceable(192) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) %0, i32 0)
; CHECK-DAG: %[[#ulong:]] = OpTypeInt 64 0
@@ -39,7 +39,7 @@ entry:
}
declare i32 @llvm.spv.flattened.thread.id.in.group()
-declare target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32, i32, i32, i32, i1, ptr)
+declare target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32, i32, i32, i32, ptr)
declare ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0), i32)
attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
diff --git a/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-2.ll b/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-2.ll
index a6efb38a23d05..c676007e80d8b 100644
--- a/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-2.ll
+++ b/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-2.ll
@@ -8,7 +8,7 @@
define <4 x float> @main(i32 %index) {
entry:
- %0 = tail call target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str)
+ %0 = tail call target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str)
%3 = tail call noundef align 1 dereferenceable(192) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) %0, i32 0)
; CHECK-DAG: %[[#ulong:]] = OpTypeInt 64 0
@@ -46,7 +46,7 @@ entry:
}
declare i32 @llvm.spv.flattened.thread.id.in.group()
-declare target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32, i32, i32, i32, i1, ptr)
+declare target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32, i32, i32, i32, ptr)
declare ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0), i32)
attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
diff --git a/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access.ll b/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access.ll
index 8e6b5a68fb769..2c2de7030577f 100644
--- a/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access.ll
+++ b/llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access.ll
@@ -28,28 +28,28 @@
define void @main() local_unnamed_addr #0 {
; CHECK-LABEL: main
-; CHECK: %43 = OpFunction %2 None %3 ; -- Begin function main
+; CHECK: %42 = OpFunction %2 None %3 ; -- Begin function main
; CHECK-NEXT: %1 = OpLabel
-; CHECK-NEXT: %44 = OpVariable %28 Function %38
-; CHECK-NEXT: %45 = OpVariable %27 Function %39
-; CHECK-NEXT: %46 = OpCopyObject %19 %40
-; CHECK-NEXT: %47 = OpCopyObject %16 %41
-; CHECK-NEXT: %48 = OpLoad %4 %42
-; CHECK-NEXT: %49 = OpAccessChain %13 %46 %29 %48
-; CHECK-NEXT: %50 = OpInBoundsAccessChain %9 %49 %31
-; CHECK-NEXT: %51 = OpLoad %8 %50 Aligned 1
-; CHECK-NEXT: %52 = OpAccessChain %11 %47 %29 %48
-; CHECK-NEXT: %53 = OpInBoundsAccessChain %9 %52 %29
-; CHECK-NEXT: OpStore %53 %51 Aligned 1
-; CHECK-NEXT: %54 = OpAccessChain %6 %49 %29
-; CHECK-NEXT: %55 = OpLoad %5 %54 Aligned 1
-; CHECK-NEXT: %56 = OpInBoundsAccessChain %6 %52 %31
-; CHECK-NEXT: OpStore %56 %55 Aligned 1
+; CHECK-NEXT: %43 = OpVariable %27 Function %37
+; CHECK-NEXT: %44 = OpVariable %26 Function %38
+; CHECK-NEXT: %45 = OpCopyObject %19 %39
+; CHECK-NEXT: %46 = OpCopyObject %16 %40
+; CHECK-NEXT: %47 = OpLoad %4 %41
+; CHECK-NEXT: %48 = OpAccessChain %13 %45 %28 %47
+; CHECK-NEXT: %49 = OpInBoundsAccessChain %9 %48 %30
+; CHECK-NEXT: %50 = OpLoad %8 %49 Aligned 1
+; CHECK-NEXT: %51 = OpAccessChain %11 %46 %28 %47
+; CHECK-NEXT: %52 = OpInBoundsAccessChain %9 %51 %28
+; CHECK-NEXT: OpStore %52 %50 Aligned 1
+; CHECK-NEXT: %53 = OpAccessChain %6 %48 %28
+; CHECK-NEXT: %54 = OpLoad %5 %53 Aligned 1
+; CHECK-NEXT: %55 = OpInBoundsAccessChain %6 %51 %30
+; CHECK-NEXT: OpStore %55 %54 Aligned 1
; CHECK-NEXT: OpReturn
; CHECK-NEXT: OpFunctionEnd
entry:
- %0 = tail call target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str)
- %1 = tail call target("spirv.VulkanBuffer", [0 x %struct.S2], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S2s_12_1t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.2)
+ %0 = tail call target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32 0, i32 1, i32 1, i32 0, ptr nonnull @.str)
+ %1 = tail call target("spirv.VulkanBuffer", [0 x %struct.S2], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S2s_12_1t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str.2)
%2 = tail call i32 @llvm.spv.flattened.thread.id.in.group()
%3 = tail call noundef align 1 dereferenceable(32) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) %0, i32 %2)
%f.i = getelementptr inbounds nuw i8, ptr addrspace(11) %3, i64 16
@@ -64,9 +64,9 @@ entry:
declare i32 @llvm.spv.flattened.thread.id.in.group()
-declare target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32, i32, i32, i32, i1, ptr)
+declare target("spirv.VulkanBuffer", [0 x %struct.S1], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S1s_12_0t(i32, i32, i32, i32, ptr)
-declare target("spirv.VulkanBuffer", [0 x %struct.S2], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S2s_12_1t(i32, i32, i32, i32, i1, ptr)
+declare target("spirv.VulkanBuffer", [0 x %struct.S2], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.S2s_12_1t(i32, i32, i32, i32, ptr)
declare ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_struct.S2s_12_1t(target("spirv.VulkanBuffer", [0 x %struct.S2], 12, 1), i32)
diff --git a/llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll b/llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
index 4cc07c249be93..ff6bf29e6a2cc 100644
--- a/llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
+++ b/llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
@@ -69,7 +69,7 @@ define external i32 @scalar_vulkan_buffer_load() {
; CHECK-NEXT: OpLabel
entry:
; CHECK: [[handle:%[0-9]+]] = OpCopyObject [[ScalarBlock_ptr]] [[ScalarBlock_var]]
- %handle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.scalarblock)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str.scalarblock)
; CHECK-NEXT: [[ptr:%[0-9]+]] = OpAccessChain [[storagebuffer_int_ptr]] [[handle]] [[zero]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x i32], 12, 0) %handle, i32 1)
@@ -117,7 +117,7 @@ define external %struct.S @vulkan_buffer_load() {
; CHECK-NEXT: OpLabel
entry:
; CHECK: [[handle:%[0-9]+]] = OpCopyObject [[buffer_ptr]] [[buffer_var]]
- %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.buffervar)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str.buffervar)
; CHECK-NEXT: [[ptr:%[0-9]+]] = OpAccessChain [[storagebuffer_S_ptr]] [[handle]] [[zero]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0) %handle, i32 1)
@@ -138,7 +138,7 @@ define external %struct.S @array_of_vulkan_buffers_load() {
entry:
; CHECK: [[h:%[0-9]+]] = OpAccessChain [[buffer_ptr]] [[array_buffer_var]] [[one]]
; CHECK: [[handle:%[0-9]+]] = OpCopyObject [[buffer_ptr]] [[h]]
- %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 1, i1 false, ptr nonnull @.str.arraybuffervar)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0) @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 1, ptr nonnull @.str.arraybuffervar)
; CHECK-NEXT: [[ptr:%[0-9]+]] = OpAccessChain [[storagebuffer_S_ptr]] [[handle]] [[zero]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11) @llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0) %handle, i32 1)
diff --git a/llvm/unittests/Target/DirectX/ResourceBindingAnalysisTests.cpp b/llvm/unittests/Target/DirectX/ResourceBindingAnalysisTests.cpp
index d4715bee51d1d..3211c2c702aab 100644
--- a/llvm/unittests/Target/DirectX/ResourceBindingAnalysisTests.cpp
+++ b/llvm/unittests/Target/DirectX/ResourceBindingAnalysisTests.cpp
@@ -51,7 +51,7 @@ TEST_F(ResourceBindingAnalysisTest, TestTrivialCase) {
StringRef Assembly = R"(
define void @main() {
entry:
- %handle = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null)
+ %handle = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null)
ret void
}
)";
@@ -71,8 +71,8 @@ TEST_F(ResourceBindingAnalysisTest, TestOverlap) {
StringRef Assembly = R"(
define void @main() {
entry:
- %handleA = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 2, i32 0, i32 -1, i32 100, i1 false, ptr null)
- %handleB = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 2, i32 4, i32 1, i32 0, i1 false, ptr null)
+ %handleA = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 2, i32 0, i32 -1, i32 100, ptr null)
+ %handleB = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 2, i32 4, i32 1, i32 0, ptr null)
ret void
}
)";
@@ -94,8 +94,8 @@ TEST_F(ResourceBindingAnalysisTest, TestExactOverlap) {
@B.str = private unnamed_addr constant [2 x i8] c"B\00", align 1
define void @main() {
entry:
- %handleA = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @A.str)
- %handleB = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @B.str)
+ %handleA = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @A.str)
+ %handleB = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @B.str)
ret void
}
)";
@@ -115,8 +115,8 @@ TEST_F(ResourceBindingAnalysisTest, TestImplicitFlag) {
StringRef Assembly = R"(
define void @main() {
entry:
- %handleA = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 100, i32 5, i32 1, i32 0, i1 false, ptr null)
- %handleB = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefromimplicitbinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
+ %handleA = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 100, i32 5, i32 1, i32 0, ptr null)
+ %handleB = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefromimplicitbinding(i32 0, i32 0, i32 1, i32 0, ptr null)
ret void
}
)";
diff --git a/llvm/unittests/Target/DirectX/UniqueResourceFromUseTests.cpp b/llvm/unittests/Target/DirectX/UniqueResourceFromUseTests.cpp
index 160a91579b202..5b54c13cae332 100644
--- a/llvm/unittests/Target/DirectX/UniqueResourceFromUseTests.cpp
+++ b/llvm/unittests/Target/DirectX/UniqueResourceFromUseTests.cpp
@@ -59,7 +59,7 @@ TEST_F(UniqueResourceFromUseTest, TestResourceCounterDecrement) {
StringRef Assembly = R"(
define void @main() {
entry:
- %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, i1 false, ptr null)
+ %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, ptr null)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 -1)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 -1)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 -1)
@@ -89,7 +89,7 @@ TEST_F(UniqueResourceFromUseTest, TestResourceCounterIncrement) {
StringRef Assembly = R"(
define void @main() {
entry:
- %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, i1 false, ptr null)
+ %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, ptr null)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 1)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 1)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 1)
@@ -119,7 +119,7 @@ TEST_F(UniqueResourceFromUseTest, TestResourceCounterUnknown) {
StringRef Assembly = R"(
define void @main() {
entry:
- %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, i1 false, ptr null)
+ %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, ptr null)
ret void
}
)";
@@ -146,8 +146,8 @@ TEST_F(UniqueResourceFromUseTest, TestResourceCounterMultiple) {
StringRef Assembly = R"(
define void @main() {
entry:
- %handle1 = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, i1 false, ptr null)
- %handle2 = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 4, i32 3, i32 2, i32 1, i1 false, ptr null)
+ %handle1 = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, ptr null)
+ %handle2 = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 4, i32 3, i32 2, i32 1, ptr null)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle1, i8 -1)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle2, i8 1)
ret void
@@ -182,7 +182,7 @@ TEST_F(UniqueResourceFromUseTest, TestResourceCounterInvalid) {
StringRef Assembly = R"(
define void @main() {
entry:
- %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, i1 false, ptr null)
+ %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, ptr null)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 -1)
call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 1)
ret void
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