[llvm] [bolt][aarch64] Skip BB instrumentation with exclusive load/store instructions (PR #154734)
Alexey Moksyakov via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 28 06:00:56 PDT 2025
yavtuk wrote:
Hi @rafaelauler, great to hear you again, let me describe this because I asked Maxim to check this fix
> 1. If using non-conservative mode, can't we skip the whole function? How prevalent are the exclusive load/store instructions? If they are rare, that would make the most sense for me.
We skipped whole function before, but found that there are a lot of functions were skipped and our profile had the holes. We decided that it is possible to skip only the basic blocks between exclusive ldr and str/clear pair instructions.
> 2. If we can't skip the whole function, can we disable non-conservative mode entirely for Aarch64?
Will check this
> 3. I assume this is hard or impossible, but for my education, is it possible to insert the instrumentation snippets even in basic blocks with exclusive load/store? What's stopping us from doing that?
Based on available docs, the hardware block monitors the target load/store address and registers state are used this pair per core. I haven't found the info about it is possible or not to insert the load store instructions with another target address and registers but as we can see for the current example, the program is hanged, probably it is due to stadd instruction inside the snippet or monitor behaviour. The deep research related to exclusive load/store will be done near future. If you have any idea let's check this.
https://github.com/llvm/llvm-project/pull/154734
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