[llvm] c4b7715 - [gn build] Port fa883e1d813c

[LLVM GN Syncbot via llvm-commits]

Author: LLVM GN Syncbot
Date: 2025-08-28T12:40:13Z
New Revision: c4b7715cfdeecc1fd387784824f0db9cd7d9dd7e

URL: https://github.com/llvm/llvm-project/commit/c4b7715cfdeecc1fd387784824f0db9cd7d9dd7e
DIFF: https://github.com/llvm/llvm-project/commit/c4b7715cfdeecc1fd387784824f0db9cd7d9dd7e.diff

LOG: [gn build] Port fa883e1d813c

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn

Removed: 
    


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diff  --git a/llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn b/llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn
index a2feb46ee17df..256a759f4cf61 100644
--- a/llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn
@@ -19,12 +19,13 @@ unittest("AArch64Tests") {
   sources = [
     "AArch64InstPrinterTest.cpp",
     "AArch64RegisterInfoTest.cpp",
-    "AArch64SelectionDAGTest.cpp",
     "AArch64SVESchedPseudoTest.cpp",
+    "AArch64SelectionDAGTest.cpp",
     "AddressingModes.cpp",
     "DecomposeStackOffsetTest.cpp",
     "Immediates.cpp",
     "InstSizes.cpp",
+    "MCInstrAnalysisTest.cpp",
     "MatrixRegisterAliasing.cpp",
     "SMEAttributesTest.cpp",
   ]