[llvm] [AArch64] Give a higher cost for more expensive SVE FCMP instructions (PR #153816)

Cullen Rhodes via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 28 01:02:15 PDT 2025


================
@@ -4365,6 +4365,34 @@ AArch64TTIImpl::getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
   return 1;
 }
 
+/// Check whether Opcode1 has less throughput according to the scheduling
+/// model than Opcode2.
+bool AArch64TTIImpl::hasLessThroughputFromSchedulingModel(
+    unsigned Opcode1, unsigned Opcode2) const {
+  const MCSchedModel &Sched = ST->getSchedModel();
+  const TargetInstrInfo *TII = ST->getInstrInfo();
+  if (!Sched.hasInstrSchedModel())
+    return false;
+
+  auto ResolveVariant = [&](unsigned Opcode) {
+    unsigned SCIdx = TII->get(Opcode).getSchedClass();
+    while (SCIdx && Sched.getSchedClassDesc(SCIdx)->isVariant())
+      SCIdx = ST->resolveVariantSchedClass(SCIdx, nullptr, TII,
+                                           Sched.getProcessorID());
+    assert(SCIdx);
+    const MCSchedClassDesc &SCDesc = Sched.SchedClassTable[SCIdx];
+    const MCWriteProcResEntry *B = ST->getWriteProcResBegin(&SCDesc);
+    const MCWriteProcResEntry *E = ST->getWriteProcResEnd(&SCDesc);
+    unsigned Min = Sched.IssueWidth;
+    for (const MCWriteProcResEntry *I = B; I != E; I++)
+      Min = std::min(Min, Sched.getProcResource(I->ProcResourceIdx)->NumUnits /
+                              (I->ReleaseAtCycle - I->AcquireAtCycle));
+    return Min;
+  };
+
+  return ResolveVariant(Opcode1) < ResolveVariant(Opcode2);
----------------
c-rhodes wrote:

ok, I'm probably missing something but with this change your tests pass for me:
```
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 860ca41ccd44..e85a17c6a43b 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -4418,21 +4418,12 @@ bool AArch64TTIImpl::hasKnownLowerThroughputFromSchedulingModel(
   if (!Sched.hasInstrSchedModel())
     return false;

-  auto GetSimpleThroughput = [&](unsigned Opcode) {
-    unsigned SCIdx = TII->get(Opcode).getSchedClass();
-    assert(!Sched.getSchedClassDesc(SCIdx)->isVariant() &&
-           "We cannot handle variant scheduling classes without an MI");
-    const MCSchedClassDesc &SCDesc = Sched.SchedClassTable[SCIdx];
-    const MCWriteProcResEntry *B = ST->getWriteProcResBegin(&SCDesc);
-    const MCWriteProcResEntry *E = ST->getWriteProcResEnd(&SCDesc);
-    double Min = Sched.IssueWidth;
-    for (const MCWriteProcResEntry *I = B; I != E; I++)
-      Min = std::min(Min, Sched.getProcResource(I->ProcResourceIdx)->NumUnits /
-                              double(I->ReleaseAtCycle - I->AcquireAtCycle));
-    return Min;
-  };
-
-  return GetSimpleThroughput(Opcode1) < GetSimpleThroughput(Opcode2);
+  return MCSchedModel::getReciprocalThroughput(
+             *ST,
+             *(Sched.getSchedClassDesc(TII->get(Opcode1).getSchedClass()))) >
+         MCSchedModel::getReciprocalThroughput(
+             *ST,
+             *(Sched.getSchedClassDesc(TII->get(Opcode2).getSchedClass())));
 }

 InstructionCost AArch64TTIImpl::getCmpSelInstrCost(
```



https://github.com/llvm/llvm-project/pull/153816


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