[llvm] [LV] Bundle sub reductions into VPExpressionRecipe (PR #147255)
Sam Tebbs via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 27 07:36:16 PDT 2025
================
@@ -5479,9 +5479,11 @@ InstructionCost AArch64TTIImpl::getExtendedReductionCost(
}
InstructionCost
-AArch64TTIImpl::getMulAccReductionCost(bool IsUnsigned, Type *ResTy,
- VectorType *VecTy,
+AArch64TTIImpl::getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode,
+ Type *ResTy, VectorType *VecTy,
TTI::TargetCostKind CostKind) const {
+ if (RedOpcode != Instruction::Add)
+ return InstructionCost::getInvalid(CostKind);
----------------
SamTebbs33 wrote:
I was going with the most conservative approach at first, but I've now allowed subs here (but made sure that it's an add in the UDOT case below). We don't need to consider a negation of the operand since this function isn't used for the chained add+sub case at the moment.
https://github.com/llvm/llvm-project/pull/147255
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