[llvm] [llvm-exegesis] Follow up of 810ac29cfe81cbd8f2e97d06f0acd540f841c754 (PR #155624)
Sjoerd Meijer via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 27 07:04:00 PDT 2025
https://github.com/sjoerdmeijer created https://github.com/llvm/llvm-project/pull/155624
Disable the test case for now as it still shows slightly different codegen in a stage2 build, which is not wrong, but needs to investigated why it is happening.
>From bcce0c430dc1cc3b607de8252c79186a9cc22217 Mon Sep 17 00:00:00 2001
From: Sjoerd Meijer <smeijer at nvidia.com>
Date: Wed, 27 Aug 2025 06:56:10 -0700
Subject: [PATCH] [llvm-exegesis] Follow up of
810ac29cfe81cbd8f2e97d06f0acd540f841c754
Disable the test case for now as it still shows slightly different
codegen in a stage2 build, which is not wrong, but needs to investigated
why it is happening.
---
llvm/test/tools/llvm-exegesis/AArch64/loop-register.s | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/llvm/test/tools/llvm-exegesis/AArch64/loop-register.s b/llvm/test/tools/llvm-exegesis/AArch64/loop-register.s
index 62040b26c8faf..632088455e75a 100644
--- a/llvm/test/tools/llvm-exegesis/AArch64/loop-register.s
+++ b/llvm/test/tools/llvm-exegesis/AArch64/loop-register.s
@@ -1,3 +1,9 @@
+; FIXME: this test fails with a stage2 build, in which case it seems to
+; generate extra function prologue instructions that interfere with matching
+; the STR of X19. Disable this for now.
+;
+; UNSUPPORTED: *
+
REQUIRES: aarch64-registered-target, asserts
RUN: llvm-exegesis -mcpu=neoverse-v2 --use-dummy-perf-counters --mode=latency --debug-only=print-gen-assembly --opcode-name=ADDVv4i16v -repetition-mode=loop 2>&1 | FileCheck %s
More information about the llvm-commits
mailing list