[llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for VPMADD52L/VPMADD52H (PR #155494)

[Simon Pilgrim via llvm-commits]

================
@@ -0,0 +1,78 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma | FileCheck %s --check-prefixes=CHECK,AVX
+
+define <2 x i64> @test_vpmadd52l(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {
+; AVX512-LABEL: test_vpmadd52l:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; AVX512-NEXT:    vpmadd52luq %xmm1, %xmm1, %xmm0
+; AVX512-NEXT:    retq
+;
+; AVX-LABEL: test_vpmadd52l:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; AVX-NEXT:    {vex} vpmadd52luq %xmm1, %xmm1, %xmm0
+; AVX-NEXT:    retq
+  %shl1 = shl <2 x i64> %x1, <i64 52, i64 52>
+  %shl2 = shl <2 x i64> %x2, <i64 52, i64 52>
+  %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %shl1, <2 x i64> %shl2)
----------------
RKSimon wrote:

Not a great test as we'll probably add a vpmadd52(0,x,y) -> y fold at some point

https://github.com/llvm/llvm-project/pull/155494