[llvm] [AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants (PR #154039)

[David Green via llvm-commits]

davemgreen wrote:

Oh - we probably need to mask the shift amount to make sure we don't shift by more than the bitwidth. Using getShiftValue(Op1) maybe.

https://github.com/llvm/llvm-project/pull/154039