[llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #149367)
Lucas Ramirez via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 26 09:18:32 PDT 2025
================
@@ -1036,6 +1041,114 @@ bool GCNSchedStage::initGCNSchedStage() {
return true;
}
+SlotIndex
+RewriteScheduleStage::findReachingDefs(MachineOperand &UseMO,
+ LiveIntervals *LIS,
+ SmallVectorImpl<SlotIndex> &DefIdxs) {
+ assert(UseMO.isReg());
+ MachineInstr *UseMI = UseMO.getParent();
+ LiveInterval &UseLI = LIS->getInterval(UseMO.getReg());
+ auto VNInfo = UseLI.getVNInfoAt(LIS->getInstructionIndex(*UseMI));
+
+ SlotIndex DefMBBStart =
+ LIS->getMBBStartIdx(LIS->getMBBFromIndex(VNInfo->def));
+
+ // If the def is in the block, then it must be the only reaching def.
+ if (DefMBBStart != VNInfo->def) {
+ DefIdxs.push_back(VNInfo->def);
+ return VNInfo->def;
+ }
+
+ SmallPtrSet<MachineBasicBlock *, 8> Visited;
+ SmallVector<MachineBasicBlock *, 8> Worklist;
+
+ Visited.insert(UseMI->getParent());
+
+ // Mark the predecessor blocks for traversal
+ for (auto PredMBB : UseMI->getParent()->predecessors()) {
+ Worklist.push_back(PredMBB);
+ Visited.insert(PredMBB);
+ }
+
+ while (!Worklist.empty()) {
+ MachineBasicBlock *CurrMBB = Worklist.pop_back_val();
+
+ SlotIndex CurrMBBEnd = LIS->getMBBEndIdx(CurrMBB);
+ auto VNInfo = UseLI.getVNInfoAt(CurrMBBEnd.getPrevSlot());
+
+ MachineBasicBlock *DefMBB = LIS->getMBBFromIndex(VNInfo->def);
+ SlotIndex DefMBBStart = LIS->getMBBStartIdx(DefMBB);
+
+ // If there is a def in this block, then add it to the list. This is the
+ // reaching def of this path.
+ if (DefMBBStart != VNInfo->def) {
+ DefIdxs.push_back(VNInfo->def);
+ continue;
+ }
+
+ for (auto PredMBB : DefMBB->predecessors()) {
+ if (Visited.insert(PredMBB).second)
+ Worklist.push_back(PredMBB);
+ }
+ }
+
+ return VNInfo->def;
+}
+
+void RewriteScheduleStage::findReachingUses(
+ MachineInstr *DefMI, LiveIntervals *LIS,
+ SmallVectorImpl<MachineOperand *> &ReachingUses) {
+ SlotIndex DefIdx = LIS->getInstructionIndex(*DefMI);
+ for (auto &UseMO :
+ DAG.MRI.use_nodbg_operands(DefMI->getOperand(0).getReg())) {
+ SmallVector<SlotIndex, 8> ReachingDefIndexes;
+ findReachingDefs(UseMO, LIS, ReachingDefIndexes);
+
+ // If we find a use that contains this DefMI in its reachingDefs, then it is
+ // a reaching use.
+ if (find_if(ReachingDefIndexes, [DefIdx](SlotIndex RDIdx) {
----------------
lucas-rami wrote:
`any` seems more meaningful here, since we don't care about the returned iterator on a successful find.
https://github.com/llvm/llvm-project/pull/149367
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