[llvm] 3d498e5 - [RISCV][NFC] Fix typo v32 -> v31 in document (#155389)

[via llvm-commits]

Author: XChy
Date: 2025-08-26T19:16:38+08:00
New Revision: 3d498e5cd2f666a5ba9ddd89ca0faeae5f82dd28

URL: https://github.com/llvm/llvm-project/commit/3d498e5cd2f666a5ba9ddd89ca0faeae5f82dd28
DIFF: https://github.com/llvm/llvm-project/commit/3d498e5cd2f666a5ba9ddd89ca0faeae5f82dd28.diff

LOG: [RISCV][NFC] Fix typo v32 -> v31 in document (#155389)

Added: 
    

Modified: 
    llvm/docs/RISCV/RISCVVectorExtension.rst

Removed: 
    


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diff  --git a/llvm/docs/RISCV/RISCVVectorExtension.rst b/llvm/docs/RISCV/RISCVVectorExtension.rst
index 525b986f98df6..6f64ddb4f329d 100644
--- a/llvm/docs/RISCV/RISCVVectorExtension.rst
+++ b/llvm/docs/RISCV/RISCVVectorExtension.rst
@@ -298,7 +298,7 @@ Register allocation is split between vector and scalar registers, with vector al
 
 There are four register classes for vectors:
 
-- ``VR`` for vector registers (``v0``, ``v1,``, ..., ``v32``). Used when :math:`\text{LMUL} \leq 1` and mask registers.
+- ``VR`` for vector registers (``v0``, ``v1,``, ..., ``v31``). Used when :math:`\text{LMUL} \leq 1` and mask registers.
 - ``VRM2`` for vector groups of length 2 i.e., :math:`\text{LMUL}=2` (``v0m2``, ``v2m2``, ..., ``v30m2``)
 - ``VRM4`` for vector groups of length 4 i.e., :math:`\text{LMUL}=4` (``v0m4``, ``v4m4``, ..., ``v28m4``)
 - ``VRM8`` for vector groups of length 8 i.e., :math:`\text{LMUL}=8` (``v0m8``, ``v8m8``, ..., ``v24m8``)