[llvm] [AMDGPU] Add pass to align inner loops (PR #152356)

[via llvm-commits]

hjagasiaAMD wrote:

Will address in MachineBlockPlacement. Closing this PR. 

With -stop-after=block-placement

  bb.1.bb2 (align 64):
    successors: %bb.2(0x04000000), %bb.1(0x7c000000)
    liveins: $sgpr0
…
The block alignment is there. Don't think there is a problem for MIR serialization-block alignment



https://github.com/llvm/llvm-project/pull/152356