[llvm] [ARM] Prefer << 31 >> 31 over -(a & 1) for THUMB1 only (PR #152936)

[via llvm-commits]

https://github.com/AZero13 created https://github.com/llvm/llvm-project/pull/152936

Materializing the 1 requires its own instruction for Thumb1

>From ba447ec8f5520a1a1f7b06d383bf3dd56212ebd1 Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Fri, 8 Aug 2025 14:55:05 -0400
Subject: [PATCH] [ARM] Prefer << 31 >> 31 over -(a & 1) for THUMB1 only

Materializing the 1 requires its own instruction for Thumb1
---
 llvm/lib/Target/ARM/ARMInstrThumb.td  | 8 ++++++++
 llvm/test/CodeGen/ARM/select_const.ll | 5 ++---
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index e38cafdf55c46..a52d0eddee92a 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -1571,6 +1571,14 @@ def : T1Pat<(ARMcmpZ tGPR:$Rn, imm0_255:$imm8),
 def : T1Pat<(ARMcmpZ tGPR:$Rn, tGPR:$Rm),
             (tCMPr   tGPR:$Rn, tGPR:$Rm)>;
 
+// -(n & 1) -> (n << 31) >> 31 to avoid materializing constants on Thumb1
+def : T1Pat<(ineg (and tGPR:$Rn, (i32 1))),
+            (tASRri (tLSLri tGPR:$Rn, 31), 31)>,
+      Requires<[IsThumb, IsThumb1Only]>;
+def : T1Pat<(sub (i32 0), (and tGPR:$Rn, (i32 1))),
+            (tASRri (tLSLri tGPR:$Rn, 31), 31)>,
+      Requires<[IsThumb, IsThumb1Only]>;
+
 // Bswap 16 with load/store
 def : T1Pat<(srl (bswap (extloadi16 t_addrmode_is2:$addr)), (i32 16)),
             (tREV16 (tLDRHi t_addrmode_is2:$addr))>;
diff --git a/llvm/test/CodeGen/ARM/select_const.ll b/llvm/test/CodeGen/ARM/select_const.ll
index 180daa12e7c52..54a14e7ac7343 100644
--- a/llvm/test/CodeGen/ARM/select_const.ll
+++ b/llvm/test/CodeGen/ARM/select_const.ll
@@ -276,9 +276,8 @@ define i32 @select_neg1_or_0(i1 %cond) {
 ;
 ; THUMB-LABEL: select_neg1_or_0:
 ; THUMB:       @ %bb.0:
-; THUMB-NEXT:    movs r1, #1
-; THUMB-NEXT:    ands r1, r0
-; THUMB-NEXT:    rsbs r0, r1, #0
+; THUMB-NEXT:    lsls r0, r0, #31
+; THUMB-NEXT:    asrs r0, r0, #31
 ; THUMB-NEXT:    bx lr
   %sel = select i1 %cond, i32 -1, i32 0
   ret i32 %sel