[llvm] [AVR] Optimize for no SPH devices (PR #152905)

[Tom Vijlbrief via llvm-commits]

https://github.com/tomtor created https://github.com/llvm/llvm-project/pull/152905

Minimal fix for https://github.com/llvm/llvm-project/issues/148560

>From ea170be328bd8195847720ed0eff1055585eb514 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief <tvijlbrief at gmail.com>
Date: Tue, 15 Jul 2025 21:34:15 +0200
Subject: [PATCH] Optimize for no SPH devices

---
 llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp | 25 +++++++++++---------
 llvm/test/CodeGen/AVR/pseudo/SPWRITE.mir     |  5 +---
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp b/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
index 90505aa82aa46..cbd1f5fba322e 100644
--- a/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
@@ -2547,25 +2547,28 @@ bool AVRExpandPseudo::expand<AVR::SPWRITE>(Block &MBB, BlockIt MBBI) {
         .addReg(SrcHiReg, getKillRegState(SrcIsKill))
         .setMIFlags(Flags);
 
-  } else { // Disable interrupts for older devices (3 extra instructions)
+  } else { // Disable interrupts for older devices with SPH (3 extra
+           // instructions)
 
-    buildMI(MBB, MBBI, AVR::INRdA)
-        .addReg(STI.getTmpRegister(), RegState::Define)
-        .addImm(STI.getIORegSREG())
-        .setMIFlags(Flags);
+    if (STI.getIORegSPH() != -1) {
+
+      buildMI(MBB, MBBI, AVR::INRdA)
+          .addReg(STI.getTmpRegister(), RegState::Define)
+          .addImm(STI.getIORegSREG())
+          .setMIFlags(Flags);
 
-    buildMI(MBB, MBBI, AVR::BCLRs).addImm(0x07).setMIFlags(Flags);
+      buildMI(MBB, MBBI, AVR::BCLRs).addImm(0x07).setMIFlags(Flags);
 
-    if (STI.getIORegSPH() != -1)
       buildMI(MBB, MBBI, AVR::OUTARr)
           .addImm(STI.getIORegSPH())
           .addReg(SrcHiReg, getKillRegState(SrcIsKill))
           .setMIFlags(Flags);
 
-    buildMI(MBB, MBBI, AVR::OUTARr)
-        .addImm(STI.getIORegSREG())
-        .addReg(STI.getTmpRegister(), RegState::Kill)
-        .setMIFlags(Flags);
+      buildMI(MBB, MBBI, AVR::OUTARr)
+          .addImm(STI.getIORegSREG())
+          .addReg(STI.getTmpRegister(), RegState::Kill)
+          .setMIFlags(Flags);
+    }
 
     buildMI(MBB, MBBI, AVR::OUTARr)
         .addImm(STI.getIORegSPL())
diff --git a/llvm/test/CodeGen/AVR/pseudo/SPWRITE.mir b/llvm/test/CodeGen/AVR/pseudo/SPWRITE.mir
index ed6e39c641b11..4e6f8eb148a23 100644
--- a/llvm/test/CodeGen/AVR/pseudo/SPWRITE.mir
+++ b/llvm/test/CodeGen/AVR/pseudo/SPWRITE.mir
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=avr-expand-pseudo -mtriple=avr -mcpu=attiny11 %s -o - \
+# RUN: llc -O0 -run-pass=avr-expand-pseudo -mtriple=avr -mcpu=attiny13 %s -o - \
 # RUN:     | FileCheck --check-prefix=NOSPH %s
 # RUN: llc -O0 -run-pass=avr-expand-pseudo -mtriple=avr -mcpu=atmega328 %s -o - \
 # RUN:     | FileCheck %s
@@ -34,9 +34,6 @@ body: |
     ; CHECK:       OUTARr 61, $r14
 
     ; NOSPH-LABEL: test
-    ; NOSPH:       $r0 = INRdA 63
-    ; NOSPH:       BCLRs 7, implicit-def $sreg
-    ; NOSPH:       OUTARr 63, killed $r0
     ; NOSPH:       OUTARr 61, $r14
 
     ; XMEGA-LABEL: test