[llvm] 4cdfc0d - [AMDGPU] Baseline test for ptrtoaddr in lower-buffer-fat-pointers

[via llvm-commits]

Author: Alexander Richardson
Date: 2025-08-09T16:26:57-07:00
New Revision: 4cdfc0dc0d1c509d7a07650fee05cb91c822f20c

URL: https://github.com/llvm/llvm-project/commit/4cdfc0dc0d1c509d7a07650fee05cb91c822f20c
DIFF: https://github.com/llvm/llvm-project/commit/4cdfc0dc0d1c509d7a07650fee05cb91c822f20c.diff

LOG: [AMDGPU] Baseline test for ptrtoaddr in lower-buffer-fat-pointers

We should only be extracting the 32-bit offset in the ptrtoaddr case.

Reviewed By: arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/143812

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
index 63c0463149b79..e1c22edfc01cf 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
+++ b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
@@ -1,6 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
-; RUN: opt -S -mcpu=gfx900 -amdgpu-lower-buffer-fat-pointers < %s | FileCheck %s
-; RUN: opt -S -mcpu=gfx900 -passes=amdgpu-lower-buffer-fat-pointers < %s | FileCheck %s
+; FIXME: Currently generates invalid IR for ptrtoaddr
+; RUN: opt -S -mcpu=gfx900 -amdgpu-lower-buffer-fat-pointers -disable-verify < %s | FileCheck %s
+; RUN: opt -S -mcpu=gfx900 -passes=amdgpu-lower-buffer-fat-pointers -disable-verify < %s | FileCheck %s
 
 target triple = "amdgcn--"
 
@@ -255,6 +256,56 @@ define i32 @ptrtoint_offset(ptr addrspace(7) %ptr) {
   ret i32 %ret
 }
 
+;; FIXME: this currently generates invalid IR
+define i32 @ptrtoaddr(ptr addrspace(7) %ptr) {
+; CHECK-LABEL: define i32 @ptrtoaddr
+; CHECK-SAME: ({ ptr addrspace(8), i32 } [[PTR:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[RET:%.*]] = ptrtoaddr { ptr addrspace(8), i32 } [[PTR]] to i32
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+  %ret = ptrtoaddr ptr addrspace(7) %ptr to i32
+  ret i32 %ret
+}
+
+;; FIXME: this currently generates invalid IR
+define <2 x i32> @ptrtoaddr_vec(<2 x ptr addrspace(7)> %ptr) {
+; CHECK-LABEL: define <2 x i32> @ptrtoaddr_vec
+; CHECK-SAME: ({ <2 x ptr addrspace(8)>, <2 x i32> } [[PTR:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[RET:%.*]] = ptrtoaddr { <2 x ptr addrspace(8)>, <2 x i32> } [[PTR]] to <2 x i32>
+; CHECK-NEXT:    ret <2 x i32> [[RET]]
+;
+  %ret = ptrtoaddr <2 x ptr addrspace(7)> %ptr to <2 x i32>
+  ret <2 x i32> %ret
+}
+
+;; Check that we extend the offset to i160.
+;; FIXME: this currently generates invalid IR
+define i160 @ptrtoaddr_ext(ptr addrspace(7) %ptr) {
+; CHECK-LABEL: define i160 @ptrtoaddr_ext
+; CHECK-SAME: ({ ptr addrspace(8), i32 } [[PTR:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[ADDR:%.*]] = ptrtoaddr { ptr addrspace(8), i32 } [[PTR]] to i32
+; CHECK-NEXT:    [[EXT:%.*]] = zext i32 [[ADDR]] to i160
+; CHECK-NEXT:    ret i160 [[EXT]]
+;
+  %addr = ptrtoaddr ptr addrspace(7) %ptr to i32
+  %ext = zext i32 %addr to i160
+  ret i160 %ext
+}
+
+;; FIXME: this currently generates invalid IR
+;; Check that we truncate the offset to i16.
+define i16 @ptrtoaddr_trunc(ptr addrspace(7) %ptr) {
+; CHECK-LABEL: define i16 @ptrtoaddr_trunc
+; CHECK-SAME: ({ ptr addrspace(8), i32 } [[PTR:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:    [[ADDR:%.*]] = ptrtoaddr { ptr addrspace(8), i32 } [[PTR]] to i32
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[ADDR]] to i16
+; CHECK-NEXT:    ret i16 [[TRUNC]]
+;
+  %addr = ptrtoaddr ptr addrspace(7) %ptr to i32
+  %trunc = trunc i32 %addr to i16
+  ret i16 %trunc
+}
+
 define ptr addrspace(7) @inttoptr(i160 %v) {
 ; CHECK-LABEL: define { ptr addrspace(8), i32 } @inttoptr
 ; CHECK-SAME: (i160 [[V:%.*]]) #[[ATTR0]] {