[llvm] [RISCV] Track Linker Relaxable through Assembly Relaxation (PR #152602)

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Sat Aug 9 12:25:43 PDT 2025


================
@@ -803,6 +803,41 @@ void RISCVAsmBackend::maybeAddVendorReloc(const MCFragment &F,
   Asm->getWriter().recordRelocation(F, VendorFixup, VendorTarget, VendorValue);
 }
 
+static bool fixupGetsRelaxRelocation(const MCFixupKind Kind) {
+  switch (Kind) {
----------------
MaskRay wrote:

Encoding the complement set is clearer.
```cpp
static bool fixupGetsRelaxRelocation(const MCFixupKind Kind) {
  switch (Kind) {
  case RISCV::fixup_riscv_rvc_jump:
  case RISCV::fixup_riscv_rvc_branch:
  case RISCV::fixup_riscv_jal:
    return false;
  }
  return true;
}
```

We are essentially listing short-range fixups that suppress RELAX relocations. Perhaps a function name like `fixupSuppressRelax` is clearer.

https://github.com/llvm/llvm-project/pull/152602


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