[llvm] 10e146a - [AMDGPU] Fix out of bound physreg tuple condition. NFC. (#152777)

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Sat Aug 9 01:50:18 PDT 2025


Author: Stanislav Mekhanoshin
Date: 2025-08-09T01:50:13-07:00
New Revision: 10e146a7161065429629a13f99c179a61ffe7721

URL: https://github.com/llvm/llvm-project/commit/10e146a7161065429629a13f99c179a61ffe7721
DIFF: https://github.com/llvm/llvm-project/commit/10e146a7161065429629a13f99c179a61ffe7721.diff

LOG: [AMDGPU] Fix out of bound physreg tuple condition. NFC. (#152777)

The end register of the tuple shall be below the last existing
register. The check does not work on something like {v[255:256]}.
Overall it works correctly because if fails later at the
getMatchingSuperReg() call.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 1b7d65a31635f..e866bd47e267d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -16925,7 +16925,7 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,
 
     if (RC) {
       if (NumRegs > 1) {
-        if (Idx >= RC->getNumRegs() || Idx + NumRegs - 1 > RC->getNumRegs())
+        if (Idx >= RC->getNumRegs() || Idx + NumRegs - 1 >= RC->getNumRegs())
           return std::pair(0U, nullptr);
 
         uint32_t Width = NumRegs * 32;


        


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