[llvm] [RISCV] Track Linker Relaxable through Assembly Relaxation (PR #152602)

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git-clang-format --diff HEAD~1 HEAD --extensions h,cpp -- llvm/lib/MC/MCFragment.cpp llvm/lib/MC/MCObjectStreamer.cpp llvm/lib/MC/MCSection.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
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diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
index d28fc6300..ed72ee6ce 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
@@ -675,8 +675,8 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
       FixupKind = RISCV::fixup_riscv_12_i;
     } else if (MIFrm == RISCVII::InstFormatQC_EB) {
       FixupKind = RISCV::fixup_riscv_qc_e_branch;
-      // This might be assembler relaxed to `qc.e.b<cc>; jal` but we cannot relax
-      // the `jal` again in the assembler.
+      // This might be assembler relaxed to `qc.e.b<cc>; jal` but we cannot
+      // relax the `jal` again in the assembler.
     } else if (MIFrm == RISCVII::InstFormatQC_EAI) {
       FixupKind = RISCV::fixup_riscv_qc_e_32;
       RelaxCandidate = true;

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https://github.com/llvm/llvm-project/pull/152602