[llvm] e91f684 - [RISCV] Update SpacemiT-X60 vector fixed-point arithmetic latencies (#150517)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 8 07:57:40 PDT 2025
Author: Mikhail R. Gadelha
Date: 2025-08-08T11:57:35-03:00
New Revision: e91f68487cf1af83d4225f3459482b2f171f20a4
URL: https://github.com/llvm/llvm-project/commit/e91f68487cf1af83d4225f3459482b2f171f20a4
DIFF: https://github.com/llvm/llvm-project/commit/e91f68487cf1af83d4225f3459482b2f171f20a4.diff
LOG: [RISCV] Update SpacemiT-X60 vector fixed-point arithmetic latencies (#150517)
This PR adds hardware-measured latencies for all instructions defined in
Section 12 of the RVV specification: "Vector Fixed-Point Arithmetic
Instructions" to the SpacemiT-X60 scheduling model.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
index 5541506ceb1e3..24ebbc3007cec 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -524,16 +524,33 @@ foreach mx = SchedMxListW in {
foreach mx = SchedMxList in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
- defm "" : LMULWriteResMX<"WriteVSALUV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVSALUX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVSALUI", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVAALUV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVAALUX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVSMulV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVSMulX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVSShiftV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVSShiftX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVSShiftI", [SMX60_VIEU], mx, IsWorstCase>;
+ let Latency = Get4458Latency<mx>.c, ReleaseAtCycles = [ConstOneUntilM1ThenDouble<mx>.c] in {
+ defm "" : LMULWriteResMX<"WriteVSALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSALUI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVAALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVAALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ }
+
+ // Latency of vsmul: e8/e16 = 4/4/5/8, e32 = 5/5/5/8, e64 = 7/8/16/32
+ // We use the worst-case until we can split the SEW.
+ defvar VSMulLat = ConstValueUntilLMULThenDoubleBase<"M2", 7, 8, mx>.c;
+ // Latency of vsmul: e8/e16/e32 = 1/2/4/8, e64 = 4/8/16/32
+ // We use the worst-case until we can split the SEW.
+ defvar VSMulOcc = ConstValueUntilLMULThenDoubleBase<"M1", 1, 4, mx>.c;
+ // TODO: change WriteVSMulV/X to be defined with LMULSEWSchedWrites
+ let Latency = VSMulLat, ReleaseAtCycles = [VSMulOcc] in {
+ defm "" : LMULWriteResMX<"WriteVSMulV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSMulX", [SMX60_VIEU], mx, IsWorstCase>;
+ }
+
+ defvar VSShiftLat = ConstValueUntilLMULThenDouble<"M2", 4, mx>.c;
+ defvar VSShiftOcc = ConstOneUntilMF2ThenDouble<mx>.c;
+ let Latency = VSShiftLat, ReleaseAtCycles = [VSShiftOcc] in {
+ defm "" : LMULWriteResMX<"WriteVSShiftV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSShiftX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVSShiftI", [SMX60_VIEU], mx, IsWorstCase>;
+ }
}
// 13. Vector Floating-Point Instructions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll b/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
index 7990dfc0880a5..4c84304405cbc 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
@@ -366,8 +366,8 @@ define void @test1(ptr nocapture noundef writeonly %dst, i32 noundef signext %i_
; RV64X60-NEXT: # => This Inner Loop Header: Depth=2
; RV64X60-NEXT: vl2r.v v8, (s2)
; RV64X60-NEXT: vl2r.v v10, (s3)
-; RV64X60-NEXT: sub s1, s1, t3
; RV64X60-NEXT: vaaddu.vv v8, v8, v10
+; RV64X60-NEXT: sub s1, s1, t3
; RV64X60-NEXT: vs2r.v v8, (s4)
; RV64X60-NEXT: add s4, s4, t3
; RV64X60-NEXT: add s3, s3, t3
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
index 5cf5ed575a3e2..234a3e2b6689c 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
@@ -3002,357 +3002,357 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VX vaaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VV vaadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VX vaadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VV vasubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VX vasubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VV vasub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -3882,445 +3882,445 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VV vsaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VX vsaddu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VI vsadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VV vsadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VX vsadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VV vssubu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VX vssubu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VV vssub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4574,7 +4574,7 @@ vwsub.wx v8, v16, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 1120.00 - - - - 3292.00 -
+# CHECK-NEXT: - 1120.00 - - - - 4084.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
@@ -5267,11 +5267,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5279,29 +5279,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5311,11 +5311,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5323,29 +5323,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5355,11 +5355,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5367,29 +5367,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vaadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5399,11 +5399,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5411,29 +5411,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vaadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5443,11 +5443,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5455,29 +5455,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vasubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5487,11 +5487,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5499,29 +5499,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vasubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5531,11 +5531,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5543,29 +5543,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vasub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5575,11 +5575,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5587,29 +5587,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6147,11 +6147,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6159,29 +6159,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6191,11 +6191,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6203,29 +6203,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6235,11 +6235,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6247,29 +6247,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6279,11 +6279,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6291,29 +6291,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6323,11 +6323,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6335,29 +6335,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6367,11 +6367,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6379,29 +6379,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6411,11 +6411,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6423,29 +6423,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssubu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6455,11 +6455,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6467,29 +6467,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssubu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6499,11 +6499,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6511,29 +6511,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6543,11 +6543,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6555,29 +6555,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
index 89d38728be107..5a5f366aa79f3 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
@@ -2630,269 +2630,269 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VV vssra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VX vssra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VI vssrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VV vssrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VX vssrl.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -2906,7 +2906,7 @@ vssrl.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 708.00 - - - - 2436.00 -
+# CHECK-NEXT: - 708.00 - - - - 3060.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
@@ -4069,43 +4069,43 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4113,43 +4113,43 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4157,43 +4157,43 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vssra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4201,43 +4201,43 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4245,43 +4245,43 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4289,40 +4289,40 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vssrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vssrl.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
index 572ebf22692b3..a166f15a99b8d 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
@@ -1906,93 +1906,93 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VX vsmul.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -2006,7 +2006,7 @@ vsmul.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 486.00 - - - - 3748.00 -
+# CHECK-NEXT: - 486.00 - - - - 4196.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
@@ -2901,43 +2901,43 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2945,40 +2945,40 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vsmul.vx v8, v8, t5
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