[llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)

Benjamin Maxwell via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 8 06:01:37 PDT 2025


================
@@ -128,7 +129,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
                    unsigned MinSVEVectorSizeInBitsOverride = 0,
                    unsigned MaxSVEVectorSizeInBitsOverride = 0,
                    bool IsStreaming = false, bool IsStreamingCompatible = false,
-                   bool HasMinSize = false);
+                   bool HasMinSize = false, bool UseNewSMEABILowering = false);
----------------
MacDue wrote:

Looked at some other targets and copied how the `ARM` target handles this (which allows `getTM().useNewSMEABILowering()` in ISel, which is a little more convenient). 

https://github.com/llvm/llvm-project/pull/149062


More information about the llvm-commits mailing list