[llvm] AMDGPU: Rewrite VGPR MFMAs to AGPR when directly copied to AGPR class (PR #152480)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 8 01:49:02 PDT 2025


================
@@ -109,12 +109,17 @@ bool AMDGPURewriteAGPRCopyMFMAImpl::run(MachineFunction &MF) const {
 
     // Find AV_* registers assigned to AGPRs.
     const TargetRegisterClass *VirtRegRC = MRI.getRegClass(VReg);
-    if (!TRI.isVectorSuperClass(VirtRegRC))
+    if (!TRI.hasAGPRs(VirtRegRC))
       continue;
 
-    const TargetRegisterClass *AssignedRC = TRI.getPhysRegBaseClass(PhysReg);
-    if (!TRI.isAGPRClass(AssignedRC))
-      continue;
+    const TargetRegisterClass *AssignedRC = VirtRegRC;
----------------
arsenm wrote:

If the original vreg class is AGPR, it already is. The set below is also not redundant. We looked through the copy and need to mutate the class of the source register to be the concrete AGPR class for the MFMA operand constraints 

https://github.com/llvm/llvm-project/pull/152480


More information about the llvm-commits mailing list