[libc] [llvm] Add vector-based strlen implementation for x86_64 and aarch64 (PR #152389)

[via llvm-commits]

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@@ -0,0 +1,50 @@
+//===-- Strlen implementation for aarch64 ---------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+#ifndef LLVM_LIBC_SRC_STRING_MEMORY_UTILS_AARCH64_INLINE_STRLEN_H
+#define LLVM_LIBC_SRC_STRING_MEMORY_UTILS_AARCH64_INLINE_STRLEN_H
+
+#include <arm_neon.h>
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overmighty wrote:

There are `#ifdef __ARM_NEON` guards in existing code in LLVM-libc.

My understanding is that all known Armv8-A and Armv9-A CPUs have NEON:

https://github.com/llvm/llvm-project/blob/9234066476aa82cfac3cee564883a3124df4584e/llvm/lib/Target/AArch64/AArch64Features.td#L853-L856

https://github.com/llvm/llvm-project/blob/9234066476aa82cfac3cee564883a3124df4584e/llvm/lib/Target/AArch64/AArch64Features.td#L871-L873

But a CPU without NEON is theoretically possible:

> FEAT_AdvSIMD includes support for the SISD and SIMD operations. All Armv8-A systems that support standard
operating systems with rich application environments also provide hardware support for Advanced SIMD instructions.
>
> [...]
> FEAT_AdvSIMD is OPTIONAL from Armv8.0.

https://developer.arm.com/documentation/102105/latest/, page 87.

I'm not sure about Armv8-R.

https://github.com/llvm/llvm-project/pull/152389