[llvm] [SPIRV] Create a new OpSelect selector and fix register types. (PR #152311)
Farzon Lotfi via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 7 10:35:43 PDT 2025
================
@@ -2564,8 +2577,54 @@ Register SPIRVInstructionSelector::buildOnesVal(bool AllOnes,
bool SPIRVInstructionSelector::selectSelect(Register ResVReg,
const SPIRVType *ResType,
- MachineInstr &I,
- bool IsSigned) const {
+ MachineInstr &I) const {
+ bool IsFloatTy =
+ GR.isScalarOrVectorOfType(I.getOperand(2).getReg(), SPIRV::OpTypeFloat) ||
+ GR.isScalarOrVectorOfType(I.getOperand(3).getReg(), SPIRV::OpTypeFloat);
+
+ bool IsPtrTy =
+ GR.isScalarOrVectorOfType(I.getOperand(2).getReg(),
+ SPIRV::OpTypePointer) ||
+ GR.isScalarOrVectorOfType(I.getOperand(3).getReg(), SPIRV::OpTypePointer);
+ bool IsVectorTy =
+ GR.getSPIRVTypeForVReg(I.getOperand(2).getReg())->getOpcode() ==
+ SPIRV::OpTypeVector ||
+ GR.getSPIRVTypeForVReg(I.getOperand(3).getReg())->getOpcode() ==
+ SPIRV::OpTypeVector;
+
+ bool IsScalarBool =
+ GR.isScalarOfType(I.getOperand(1).getReg(), SPIRV::OpTypeBool);
+ unsigned Opcode;
+ if (IsVectorTy) {
+ if (IsFloatTy) {
+ Opcode = IsScalarBool ? SPIRV::OpSelectVFSCond : SPIRV::OpSelectVFVCond;
----------------
farzonl wrote:
I actually don't like how this one was designed because it went really hard on the tablegen unnecessarily. But essentially G_Select was not an instruction they wanted to legalize and instead it is handled as part of resolving `SPIRV::ASSIGN_TYPE`.
>From what I noticed There is a verifier step after instruction selection and they have typed versions of every opcode to help the verifier. But how the executeMatchTable/getMatchTable was done because of all these OpSelects meant that we were never toggling to use the right one for this case.
https://github.com/llvm/llvm-project/pull/152311
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