[llvm] [DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::FMA/FMAD + tests (PR #152187)
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Thu Aug 7 10:02:27 PDT 2025
https://github.com/Seraphimt updated https://github.com/llvm/llvm-project/pull/152187
>From c82282103753cb6a4f95fb5974434a494729e6cc Mon Sep 17 00:00:00 2001
From: Seraphimt <svet58585 at mail.ru>
Date: Mon, 4 Aug 2025 22:10:54 +0300
Subject: [PATCH 1/4] Add pre-commit test for issues/147693
---
llvm/test/CodeGen/AArch64/fma-fneg-combine.ll | 53 +++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
diff --git a/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll b/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
new file mode 100644
index 0000000000000..fc51eb6b1c05a
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
@@ -0,0 +1,53 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s --check-prefixes=CHECK
+
+define float @positive_case_fma(float %a0, float %a1, float %a2) {
+; CHECK-LABEL: positive_case_fma:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmadd s0, s0, s1, s2
+; CHECK-NEXT: fneg s0, s0
+; CHECK-NEXT: ret
+ %fma = call float @llvm.fma.f32(float %a0, float %a1, float %a2)
+ %freeze = freeze float %fma
+ %fneg = fneg float %freeze
+ ret float %fneg
+}
+
+define float @negative_case_fma(float %a0, float %a1) {
+; CHECK-LABEL: negative_case_fma:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmadd s0, s0, s1, s0
+; CHECK-NEXT: fneg s0, s0
+; CHECK-NEXT: ret
+ %fma = call float @llvm.fma.f32(float %a0, float %a1, float poison)
+ %freeze = freeze float %fma
+ %fneg = fneg float %freeze
+ ret float %fneg
+}
+
+define float @positive_case_fmad(float %a0, float %a1, float %a2) {
+; CHECK-LABEL: positive_case_fmad:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmadd s0, s0, s1, s2
+; CHECK-NEXT: fneg s0, s0
+; CHECK-NEXT: ret
+ %fma = call float @llvm.fma.f32(float %a0, float %a1, float %a2)
+ %freeze = freeze float %fma
+ %fneg = fneg float %freeze
+ ret float %fneg
+}
+
+define float @negative_case_fmad(float %a0, float %a1) {
+; CHECK-LABEL: negative_case_fmad:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmadd s0, s0, s1, s0
+; CHECK-NEXT: fneg s0, s0
+; CHECK-NEXT: ret
+ %fmad = call float @llvm.fmuladd.f32(float %a0, float %a1, float poison)
+ %freeze = freeze float %fmad
+ %fneg = fneg float %freeze
+ ret float %fneg
+}
+
+
+
>From 7f7337e0c5c56060f0484035a526862bb6b1cb49 Mon Sep 17 00:00:00 2001
From: Seraphimt <svet58585 at mail.ru>
Date: Mon, 4 Aug 2025 23:26:52 +0300
Subject: [PATCH 2/4] Adding FMA\FMAD to canCreateUndefOrPoison
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 ++
llvm/test/CodeGen/AArch64/fma-fneg-combine.ll | 12 ++++--------
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 245811587e3b4..3290d0d1dbeb4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5629,6 +5629,8 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
case ISD::FDIV:
case ISD::FREM:
case ISD::FCOPYSIGN:
+ case ISD::FMA:
+ case ISD::FMAD:
// No poison except from flags (which is handled above)
return false;
diff --git a/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll b/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
index fc51eb6b1c05a..c72795f9f5d71 100644
--- a/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
+++ b/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
@@ -4,8 +4,7 @@
define float @positive_case_fma(float %a0, float %a1, float %a2) {
; CHECK-LABEL: positive_case_fma:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmadd s0, s0, s1, s2
-; CHECK-NEXT: fneg s0, s0
+; CHECK-NEXT: fnmadd s0, s0, s1, s2
; CHECK-NEXT: ret
%fma = call float @llvm.fma.f32(float %a0, float %a1, float %a2)
%freeze = freeze float %fma
@@ -16,8 +15,7 @@ define float @positive_case_fma(float %a0, float %a1, float %a2) {
define float @negative_case_fma(float %a0, float %a1) {
; CHECK-LABEL: negative_case_fma:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmadd s0, s0, s1, s0
-; CHECK-NEXT: fneg s0, s0
+; CHECK-NEXT: fnmadd s0, s0, s1, s0
; CHECK-NEXT: ret
%fma = call float @llvm.fma.f32(float %a0, float %a1, float poison)
%freeze = freeze float %fma
@@ -28,8 +26,7 @@ define float @negative_case_fma(float %a0, float %a1) {
define float @positive_case_fmad(float %a0, float %a1, float %a2) {
; CHECK-LABEL: positive_case_fmad:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmadd s0, s0, s1, s2
-; CHECK-NEXT: fneg s0, s0
+; CHECK-NEXT: fnmadd s0, s0, s1, s2
; CHECK-NEXT: ret
%fma = call float @llvm.fma.f32(float %a0, float %a1, float %a2)
%freeze = freeze float %fma
@@ -40,8 +37,7 @@ define float @positive_case_fmad(float %a0, float %a1, float %a2) {
define float @negative_case_fmad(float %a0, float %a1) {
; CHECK-LABEL: negative_case_fmad:
; CHECK: // %bb.0:
-; CHECK-NEXT: fmadd s0, s0, s1, s0
-; CHECK-NEXT: fneg s0, s0
+; CHECK-NEXT: fnmadd s0, s0, s1, s0
; CHECK-NEXT: ret
%fmad = call float @llvm.fmuladd.f32(float %a0, float %a1, float poison)
%freeze = freeze float %fmad
>From 33b7898800f1eb1a3a13c3015a5a409a3b146010 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <arsenm2 at gmail.com>
Date: Wed, 6 Aug 2025 09:08:37 +0900
Subject: [PATCH 3/4] Update llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
---
llvm/test/CodeGen/AArch64/fma-fneg-combine.ll | 2 --
1 file changed, 2 deletions(-)
diff --git a/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll b/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
index c72795f9f5d71..936cc6a7d366f 100644
--- a/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
+++ b/llvm/test/CodeGen/AArch64/fma-fneg-combine.ll
@@ -45,5 +45,3 @@ define float @negative_case_fmad(float %a0, float %a1) {
ret float %fneg
}
-
-
>From 9cbbf9fd679013e2daa0c695860ed3268c2e7a55 Mon Sep 17 00:00:00 2001
From: Seraphimt <svet58585 at mail.ru>
Date: Wed, 6 Aug 2025 20:42:24 +0300
Subject: [PATCH 4/4] Deleted excess whitespace in case.
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 3411b035fd409..d1bd4fa47dcbe 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5623,7 +5623,7 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
case ISD::FREM:
case ISD::FCOPYSIGN:
case ISD::FMA:
- case ISD::FMAD:
+ case ISD::FMAD:
// No poison except from flags (which is handled above)
return false;
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