[llvm] [AArch64] Move BSL generation to lowering. (PR #151855)

[Sander de Smalen via llvm-commits]

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@@ -14742,23 +14742,15 @@ static SDValue tryLowerToSLI(SDNode *N, SelectionDAG &DAG) {
   return ResultSLI;
 }
 
-static SDValue tryCombineToBSL(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
-                               const AArch64TargetLowering &TLI) {
+static SDValue tryLowerToBSL(SDValue N, SelectionDAG &DAG) {
   EVT VT = N->getValueType(0);
-  SelectionDAG &DAG = DCI.DAG;
+  assert(VT.isVector() && "Expected vector type in tryLowerToBSL\n");
   SDLoc DL(N);
   const auto &Subtarget = DAG.getSubtarget<AArch64Subtarget>();
 
-  if (!VT.isVector())
-    return SDValue();
-
   if (VT.isScalableVector() && !Subtarget.hasSVE2())
     return SDValue();
 
-  if (VT.isFixedLengthVector() &&
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sdesmalen-arm wrote:

Did you remove this condition on purpose?

https://github.com/llvm/llvm-project/pull/151855