[llvm] [AArch64] Allow splitting bitmasks for EOR/ORR. (PR #150394)

via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 7 08:16:09 PDT 2025


AZero13 wrote:

For what it is worth, I wonder if the assembler can take care of many of the situations for us where we can materialize a constant via adds and subs + zero reg or we have to do that ourselves.

https://github.com/llvm/llvm-project/pull/150394


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