[llvm] [PowerPC] fix lowering of SPILL_CRBIT on pwr9 and pwr10 (PR #146424)

Paul Murphy via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 6 12:07:05 PDT 2025


================
@@ -1102,13 +1102,20 @@ void PPCRegisterInfo::lowerCRBitSpilling(MachineBasicBlock::iterator II,
     SpillsKnownBit = true;
     break;
   default:
+    // When spilling a CR bit, The super register may not be explicitly defined
----------------
pmur wrote:

Fixed, thanks.

https://github.com/llvm/llvm-project/pull/146424


More information about the llvm-commits mailing list