[llvm] [RISCV] add load/store misched/PostRA subtarget features (PR #149409)

Min-Yih Hsu via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 6 09:09:17 PDT 2025


mshockwave wrote:

> > > Ping
> > > Do we require more reviews or is this good to go? Also, I don't have write access (this is my first PR for LLVM) so I'm afraid someone will have to do the honors merging this one. I'm not sure if a rebase is needed due to the conflict being pointed out too ...
> > 
> > 
> > You have enough reviews. The reviewers probably didn't think about you not having write permission.
> 
> Got it. I asked @mgudim for help.

I just merged it on your behalf

https://github.com/llvm/llvm-project/pull/149409


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