[llvm] e99c565 - MC,AMDGPU: Don't pad .text with s_code_end if it would otherwise be empty (#147980)
via llvm-commits
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Wed Aug 6 05:25:48 PDT 2025
Author: Tim Renouf
Date: 2025-08-06T13:25:45+01:00
New Revision: e99c565cd2f750c5ec3a71f60e306a5912d8cec9
URL: https://github.com/llvm/llvm-project/commit/e99c565cd2f750c5ec3a71f60e306a5912d8cec9
DIFF: https://github.com/llvm/llvm-project/commit/e99c565cd2f750c5ec3a71f60e306a5912d8cec9.diff
LOG: MC,AMDGPU: Don't pad .text with s_code_end if it would otherwise be empty (#147980)
We don't want that padding in a module that only contains data, not
code.
Also fix MCSection::hasInstructions() so it works with the asm streamer
too.
Added:
llvm/test/CodeGen/AMDGPU/empty-text.ll
Modified:
llvm/lib/MC/MCAsmStreamer.cpp
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index 93614cd61bf6e..9a5e07095fa5a 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -2432,6 +2432,11 @@ void MCAsmStreamer::AddEncodingComment(const MCInst &Inst,
void MCAsmStreamer::emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) {
+ if (CurFrag) {
+ MCSection *Sec = getCurrentSectionOnly();
+ Sec->setHasInstructions(true);
+ }
+
if (MAI->isAIX() && CurFrag)
// Now that a machine instruction has been assembled into this section, make
// a line entry for any .loc directive that has been seen.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 668139383f56c..2a324e5683910 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -486,12 +486,16 @@ bool AMDGPUAsmPrinter::doFinalization(Module &M) {
// Pad with s_code_end to help tools and guard against instruction prefetch
// causing stale data in caches. Arguably this should be done by the linker,
// which is why this isn't done for Mesa.
+ // Don't do it if there is no code.
const MCSubtargetInfo &STI = *getGlobalSTI();
if ((AMDGPU::isGFX10Plus(STI) || AMDGPU::isGFX90A(STI)) &&
(STI.getTargetTriple().getOS() == Triple::AMDHSA ||
STI.getTargetTriple().getOS() == Triple::AMDPAL)) {
- OutStreamer->switchSection(getObjFileLowering().getTextSection());
- getTargetStreamer()->EmitCodeEnd(STI);
+ MCSection *TextSect = getObjFileLowering().getTextSection();
+ if (TextSect->hasInstructions()) {
+ OutStreamer->switchSection(TextSect);
+ getTargetStreamer()->EmitCodeEnd(STI);
+ }
}
// Assign expressions which can only be resolved when all other functions are
diff --git a/llvm/test/CodeGen/AMDGPU/empty-text.ll b/llvm/test/CodeGen/AMDGPU/empty-text.ll
new file mode 100644
index 0000000000000..8aa8600cacd23
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/empty-text.ll
@@ -0,0 +1,9 @@
+; Test that there is no s_code_end padding if .text is otherwise empty.
+
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 < %s | FileCheck %s --check-prefixes=GCN
+
+ at globalVar = global i32 37
+
+declare amdgpu_ps void @funcDecl()
+
+; GCN-NOT: .fill
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