[llvm] [WebAssembly] Legalize i128 to v2i64 for setcc (PR #149461)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 5 20:56:21 PDT 2025
================
@@ -3383,15 +3383,71 @@ static SDValue TryMatchTrue(SDNode *N, EVT VecVT, SelectionDAG &DAG) {
return DAG.getZExtOrTrunc(Ret, DL, N->getValueType(0));
}
+static SDValue
+combineVectorSizedSetCCEquality(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
+ const WebAssemblySubtarget *Subtarget) {
+
+ SDLoc DL(N);
+ SDValue X = N->getOperand(0);
+ SDValue Y = N->getOperand(1);
+ EVT VT = N->getValueType(0);
+ EVT OpVT = X.getValueType();
+
+ ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
+ SelectionDAG &DAG = DCI.DAG;
+ // We're looking for an oversized integer equality comparison.
+ if (!OpVT.isScalarInteger() || !OpVT.isByteSized() || OpVT != MVT::i128 ||
+ !Subtarget->hasSIMD128())
+ return SDValue();
+
+ // Don't perform this combine if constructing the vector will be expensive.
+ auto IsVectorBitCastCheap = [](SDValue X) {
+ X = peekThroughBitcasts(X);
+ return isa<ConstantSDNode>(X) || X.getOpcode() == ISD::LOAD;
+ };
+
+ if (!IsVectorBitCastCheap(X) || !IsVectorBitCastCheap(Y))
+ return SDValue();
+
+ // TODO: Not sure what's the purpose of this? I'm keeping here since RISCV has
+ // it
----------------
lukel97 wrote:
It might be good to add a test case for this btw!
https://github.com/llvm/llvm-project/pull/149461
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