[llvm] [WebAssembly] Add fold support for dot (PR #151775)

Jasmine Tang via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 5 10:46:19 PDT 2025


================
@@ -3436,6 +3439,53 @@ static SDValue performSETCCCombine(SDNode *N,
   return SDValue();
 }
 
+static SDValue performAddCombine(SDNode *N, SelectionDAG &DAG) {
+  assert(N->getOpcode() == ISD::ADD);
+  EVT VT = N->getValueType(0);
+  SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
+
+  if (VT != MVT::v4i32)
+    return SDValue();
+
+  auto IsShuffleWithMask = [](SDValue V, ArrayRef<int> ShuffleValue) {
+    if (V.getOpcode() != ISD::VECTOR_SHUFFLE)
+      return SDValue();
+    if (cast<ShuffleVectorSDNode>(V)->getMask() != ShuffleValue)
+      return SDValue();
+    return V;
+  };
+  auto ShuffleA = IsShuffleWithMask(N0, {0, 2, 4, 6});
+  auto ShuffleB = IsShuffleWithMask(N1, {1, 3, 5, 7});
+  // two SDValues must be muls
----------------
badumbatish wrote:

I just transitioned to the tablegen pattern. Yes I was just looking at the selection dag output and match the shuffle order. I'm not quite sure where I should look for the canonicalization of these shuffles.

Here's the selectiondag into the isel phase

```
Optimized legalized selection DAG: %bb.0 'dot:entry'
SelectionDAG has 47 nodes:
  t2: v8i16 = WebAssemblyISD::ARGUMENT TargetConstant:i32<0>
  t4: v8i16 = WebAssemblyISD::ARGUMENT TargetConstant:i32<1>
    t74: v4i32 = WebAssemblyISD::EXTEND_HIGH_S t4
    t73: v4i32 = WebAssemblyISD::EXTEND_HIGH_S t2
  t53: v4i32 = mul nsw t74, t73
    t72: v4i32 = WebAssemblyISD::EXTEND_LOW_S t4
    t71: v4i32 = WebAssemblyISD::EXTEND_LOW_S t2
  t52: v4i32 = mul nsw t72, t71
    t0: ch,glue = EntryToken
      t108: v4i32 = WebAssemblyISD::SHUFFLE t52, t53, Constant:i32<0>, Constant:i32<1>, Constant:i32<2>, Constant:i32<3>, Constant:i32<8>, Constant:i32<9>, Constant:i32<10>, Constant:i32<11>, Constant:i32<16>, Constant:i32<17>, Constant:i32<18>, Constant:i32<19>, Constant:i32<24>, Constant:i32<25>, Constant:i32<26>, Constant:i32<27>
      t91: v4i32 = WebAssemblyISD::SHUFFLE t52, t53, Constant:i32<4>, Constant:i32<5>, Constant:i32<6>, Constant:i32<7>, Constant:i32<12>, Constant:i32<13>, Constant:i32<14>, Constant:i32<15>, Constant:i32<20>, Constant:i32<21>, Constant:i32<22>, Constant:i32<23>, Constant:i32<28>, Constant:i32<29>, Constant:i32<30>, Constant:i32<31>
    t28: v4i32 = add t108, t91
  t29: ch = WebAssemblyISD::RETURN t0, t28
```

https://github.com/llvm/llvm-project/pull/151775


More information about the llvm-commits mailing list