[llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)

[Sam Tebbs via llvm-commits]

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@@ -8244,6 +8244,16 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
     visitVectorExtractLastActive(I, Intrinsic);
     return;
   }
+  case Intrinsic::loop_dependence_war_mask:
+  case Intrinsic::loop_dependence_raw_mask: {
+    auto IntrinsicVT = EVT::getEVT(I.getType());
+    unsigned ID = Intrinsic == Intrinsic::loop_dependence_war_mask
+                      ? ISD::LOOP_DEPENDENCE_WAR_MASK
+                      : ISD::LOOP_DEPENDENCE_RAW_MASK;
+    setValue(&I,
+             DAG.getNode(ID, sdl, IntrinsicVT, getValue(I.getOperand(0)),
+                         getValue(I.getOperand(1)), getValue(I.getOperand(2))));
+  }
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SamTebbs33 wrote:

Done.

https://github.com/llvm/llvm-project/pull/117007