[llvm] [AArch64] Move BSL generation to lowering. (PR #151855)

[Ricardo Jesus via llvm-commits]

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@@ -14737,12 +14737,109 @@ static SDValue tryLowerToSLI(SDNode *N, SelectionDAG &DAG) {
   return ResultSLI;
 }
 
+static SDValue tryLowerToBSL(SDValue N, SelectionDAG &DAG) {
+  EVT VT = N->getValueType(0);
+  SDLoc DL(N);
+  const auto &Subtarget = DAG.getSubtarget<AArch64Subtarget>();
+
+  if (!VT.isVector())
+    return SDValue();
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rj-jesus wrote:

This could probably be made into an assert now since we explicitly only attempt to lower vectors to BSL?

https://github.com/llvm/llvm-project/pull/151855