[llvm] 43ead21 - [X86] Precommit tests for PR146575 (NFC)
Antonio Frighetto via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 5 00:51:25 PDT 2025
Author: Antonio Frighetto
Date: 2025-08-05T09:50:52+02:00
New Revision: 43ead215e4e519b99942b1bda9368681a1f13bea
URL: https://github.com/llvm/llvm-project/commit/43ead215e4e519b99942b1bda9368681a1f13bea
DIFF: https://github.com/llvm/llvm-project/commit/43ead215e4e519b99942b1bda9368681a1f13bea.diff
LOG: [X86] Precommit tests for PR146575 (NFC)
Added:
Modified:
llvm/test/CodeGen/X86/sibcall.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/sibcall.ll b/llvm/test/CodeGen/X86/sibcall.ll
index 4a0a68ee32243..e36b9b895df23 100644
--- a/llvm/test/CodeGen/X86/sibcall.ll
+++ b/llvm/test/CodeGen/X86/sibcall.ll
@@ -977,6 +977,176 @@ define ccc void @t22_non_sret_to_sret(ptr %agg.result) nounwind {
ret void
}
+; Not tailcallable, caller and callee have
diff erent return types.
+define void @t23_sret_to_non_sret(ptr noalias sret(%struct.foo) align 4 %agg.result, ptr %arg) {
+; X86-LABEL: t23_sret_to_non_sret:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: subl $8, %esp
+; X86-NEXT: .cfi_def_cfa_offset 16
+; X86-NEXT: .cfi_offset %esi, -8
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll callee_1 at PLT
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $8, %esp
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: popl %esi
+; X86-NEXT: .cfi_def_cfa_offset 4
+; X86-NEXT: retl $4
+;
+; X64-LABEL: t23_sret_to_non_sret:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rbx
+; X64-NEXT: .cfi_def_cfa_offset 16
+; X64-NEXT: .cfi_offset %rbx, -16
+; X64-NEXT: movq %rdi, %rbx
+; X64-NEXT: movq %rsi, %rdi
+; X64-NEXT: callq callee_1 at PLT
+; X64-NEXT: movq %rbx, %rax
+; X64-NEXT: popq %rbx
+; X64-NEXT: .cfi_def_cfa_offset 8
+; X64-NEXT: retq
+;
+; X32-LABEL: t23_sret_to_non_sret:
+; X32: # %bb.0:
+; X32-NEXT: pushq %rbx
+; X32-NEXT: .cfi_def_cfa_offset 16
+; X32-NEXT: .cfi_offset %rbx, -16
+; X32-NEXT: movq %rdi, %rbx
+; X32-NEXT: movq %rsi, %rdi
+; X32-NEXT: callq callee_1 at PLT
+; X32-NEXT: movl %ebx, %eax
+; X32-NEXT: popq %rbx
+; X32-NEXT: .cfi_def_cfa_offset 8
+; X32-NEXT: retq
+ tail call void @callee_1(ptr %arg)
+ ret void
+}
+
+; Not tailcallable, caller and callee have the same return type, but
diff erent return values.
+define void @t24_sret_to_sret_
diff erent_val(ptr noalias sret(%struct.foo) align 4 %agg.result, ptr %arg) {
+; X86-LABEL: t24_sret_to_sret_
diff erent_val:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: subl $24, %esp
+; X86-NEXT: .cfi_def_cfa_offset 32
+; X86-NEXT: .cfi_offset %esi, -8
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: xorps %xmm0, %xmm0
+; X86-NEXT: movsd %xmm0, 8(%esi)
+; X86-NEXT: movsd %xmm0, (%esi)
+; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll callee_2 at PLT
+; X86-NEXT: subl $4, %esp
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $24, %esp
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: popl %esi
+; X86-NEXT: .cfi_def_cfa_offset 4
+; X86-NEXT: retl $4
+;
+; X64-LABEL: t24_sret_to_sret_
diff erent_val:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rbx
+; X64-NEXT: .cfi_def_cfa_offset 16
+; X64-NEXT: subq $16, %rsp
+; X64-NEXT: .cfi_def_cfa_offset 32
+; X64-NEXT: .cfi_offset %rbx, -16
+; X64-NEXT: movq %rdi, %rbx
+; X64-NEXT: movq $0, 8(%rdi)
+; X64-NEXT: movq $0, (%rdi)
+; X64-NEXT: movq %rsp, %rdi
+; X64-NEXT: callq callee_2 at PLT
+; X64-NEXT: movq %rbx, %rax
+; X64-NEXT: addq $16, %rsp
+; X64-NEXT: .cfi_def_cfa_offset 16
+; X64-NEXT: popq %rbx
+; X64-NEXT: .cfi_def_cfa_offset 8
+; X64-NEXT: retq
+;
+; X32-LABEL: t24_sret_to_sret_
diff erent_val:
+; X32: # %bb.0:
+; X32-NEXT: pushq %rbx
+; X32-NEXT: .cfi_def_cfa_offset 16
+; X32-NEXT: subl $16, %esp
+; X32-NEXT: .cfi_def_cfa_offset 32
+; X32-NEXT: .cfi_offset %rbx, -16
+; X32-NEXT: movq %rdi, %rbx
+; X32-NEXT: movq $0, 8(%ebx)
+; X32-NEXT: movq $0, (%ebx)
+; X32-NEXT: movl %esp, %edi
+; X32-NEXT: callq callee_2 at PLT
+; X32-NEXT: movl %ebx, %eax
+; X32-NEXT: addl $16, %esp
+; X32-NEXT: .cfi_def_cfa_offset 16
+; X32-NEXT: popq %rbx
+; X32-NEXT: .cfi_def_cfa_offset 8
+; X32-NEXT: retq
+ %callee.return = alloca %struct.foo, align 4
+ tail call void @llvm.memset.p0.i64(ptr align 4 %agg.result, i8 0, i64 16, i1 false)
+ tail call void @callee_2(ptr sret(%struct.foo) align 4 %callee.return)
+ ret void
+}
+
+; Not tailcallable, caller and callee have the same return type, but
diff erent return values.
+define void @t25_sret_to_sret_
diff erent_val(ptr noalias sret(%struct.foo) align 8 %agg.result, ptr %arg) {
+; X86-LABEL: t25_sret_to_sret_
diff erent_val:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: subl $8, %esp
+; X86-NEXT: .cfi_def_cfa_offset 16
+; X86-NEXT: .cfi_offset %esi, -8
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, (%esp)
+; X86-NEXT: calll callee_2 at PLT
+; X86-NEXT: subl $4, %esp
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $8, %esp
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: popl %esi
+; X86-NEXT: .cfi_def_cfa_offset 4
+; X86-NEXT: retl $4
+;
+; X64-LABEL: t25_sret_to_sret_
diff erent_val:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rbx
+; X64-NEXT: .cfi_def_cfa_offset 16
+; X64-NEXT: .cfi_offset %rbx, -16
+; X64-NEXT: movq %rdi, %rbx
+; X64-NEXT: movq %rsi, %rdi
+; X64-NEXT: callq callee_2 at PLT
+; X64-NEXT: movq %rbx, %rax
+; X64-NEXT: popq %rbx
+; X64-NEXT: .cfi_def_cfa_offset 8
+; X64-NEXT: retq
+;
+; X32-LABEL: t25_sret_to_sret_
diff erent_val:
+; X32: # %bb.0:
+; X32-NEXT: pushq %rbx
+; X32-NEXT: .cfi_def_cfa_offset 16
+; X32-NEXT: .cfi_offset %rbx, -16
+; X32-NEXT: movq %rdi, %rbx
+; X32-NEXT: movq %rsi, %rdi
+; X32-NEXT: callq callee_2 at PLT
+; X32-NEXT: movl %ebx, %eax
+; X32-NEXT: popq %rbx
+; X32-NEXT: .cfi_def_cfa_offset 8
+; X32-NEXT: retq
+ tail call void @callee_2(ptr sret(%struct.foo) align 8 %arg)
+ ret void
+}
+
+declare void @llvm.memset.p0.i64(ptr, i8, i64, i1)
+declare void @callee_1(ptr)
+declare void @callee_2(ptr noalias sret(%struct.foo))
+
declare dso_local fastcc void @t21_f_sret(ptr noalias sret(%struct.foo)) nounwind
declare dso_local fastcc void @t21_f_sret2(ptr noalias sret(%struct.foo), ptr noalias) nounwind
declare dso_local fastcc void @t21_f_non_sret(ptr) nounwind
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